Intel

Job Details: Job Description: We are looking for Physical Design Engineers with strong RTL2GDSii Skill. Job responsibilities include Logic Synthesis, Floor-planning, Place and Route, Timing Analysis, Convergence, IR/EM analysis, Formal verification, VC-LP, DRC/LVS clean-up and delivery of the Blocks or Subsystem to SOC level that is essentially complete RTL2GDSii vertical execution skill. Desirable to have experience in full chip implementation or flow development experience. Qualifications:The right candidate must have around 5-10 years experience after B.S. or 7 years after Masters degree. He/She must have owned and closed large design blocks of size 2-3Million, High performance design more than 1.5G frequency and should be experience very deep submicron nodes i.e. 7nm or below. She/he should be experience Synopsys Tool suite or Cadence Tool Suite such as DC, ICC2/Fusion/Innovus, Primetime or alternative, Calibre/ICV, Conformal/Formality, ..etc. In addition, expertise in Ansys Redhawk-SC is highly desirable. The person should have right mindset and ability to handle dynamic changes in RTL. Automation skills in TCL/Perl/Python and Design Flow understanding is a major plus. Excellent debugging skills, Teamwork, professionalism and communications are a must. Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In Q4 2023, Intel announced Altera will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future. Altera has been delivering industry-leading custom logic solutions to customers since inventing the world's first reprogrammable logic device in 1984. To take advantage of the many opportunities that we see in the future for FPGA's, Altera is looking for great engineers to join our team. We are looking for an FPGA engineer with a software background to join our Board Farm team to maintain and enhance our FPGA board farm system and infrastructure. You will troubleshoot and debug both the hardware and software in the system and develop enhancements to improve the infrastructure and overall stability. As part of the Job profile; the candidate would be required to research, design, develop, and optimize Soft Fabric IPs using RTL design techniques that enable the use in Field Programmable Gate Arrays (FPGA). Key Responsibilities (not limited to): Work on best-in-class FPGA tool suite to deliver soft fabric IPs Understand and contribute to architecture and high-level design of Interconnect solution Architect, develop and test soft Fabric IPs Develop new features for existing IPs Collaborate with many teams worldwide involved in product development and delivery to customer Qualifications:Digital logic design experience in Verilog/SystemVerilog/VHDLExperience in developing unit level testbenches with Verilog/SystemVerilogExperience with simulation tools like VCS and ModelsimKnowledge of industry standard Memory Mapped and Streaming protocols including AMBA AXI protocols.Familiarity with network-on-chip (NoC) topologies and design methodology.Experience in FPGA design and familiarity with FPGA design tools - Intel FPGA Quartus, Xilinx Vivado, Vitis etc.Experience in timing closure for high speed FPGA designsKnowledge of scripting in tcl, perl or python.Excellent communication Skills Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: As a Research Scientist in Intel AI Lab, you will develop novel machine learning capabilities for a wide range of applications. This role will focus on machine learning techniques to accelerate computational chemistry. You will bring together state-of-the-art geometric deep learning and scalable machine learning techniques to accelerate traditional scientific computing pipelines. The outcomes from this research vector will be publications at top tier conferences and journals, open source software tools for developers and practitioners and direct technology transfers to business units within Intel for adoption into commercial design flows. The ideal candidate should exhibit the following behavioral traits: · Problem-solving skills. · Ability to multitask. · Strong written and verbal communication skills · Ability to work in a dynamic and team-oriented environment. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience. Minimum Qualifications: The candidate must possess a PhD degree in Computer Science, Electrical Engineering, or any related fields (Statistics, Applied Math, or Computational Neuroscience) 1+ year of experience on below areas: ·Design and train deep learning models and other machine learning techniques. ·Original contributions to the fields of deep reinforcement learning in the form of peer-reviewed publications at top-tier conferences or journals. ·Familiarity with DL, ML frameworks like PyTorch and TensorFlow Preferred Qualifications: ·Experience using ML acceleration tools like DeepSpeed. ·Experience training large scale ML models in distributed, model-parallel, or data-parallel settings. ·Demonstrable ability to execute projects end to end - e.g., via projects on GitHub, Kaggle ranks, etc. ·Graduate level training and understanding of classical methods in Computational Chemistry, Molecular Search, Materials Science, etc. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: Virtual US Additional Locations: Business group:Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, Colorado, New York, Washington, California:$162,082.00-$243,222.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. The application window for this job posting is expected to end by 07/08/2024

Job Details: Job Description: As technology permeates every aspect of our lives, we at Intel see an insatiable demand for processing power. Fueled by AI and the convergence of ubiquitous compute, connectivity, infrastructure and sensing, this demand signals a new era – one requiring an exponential leap in compute technology. Intel’s opportunity is to push the boundaries of what’s possible through collaboratively innovating with our partners to create solutions to the world’s biggest challenges and to deliver on our corporate purpose to improve the life of every person on the planet through our technology solutions. Our team is focused on developing and delivering integrated campaigns designed to increase Intel’s perception as a technology leader, get credit for our innovations among targeted B2B audiences, and drive demand for Intel client and data center products through our “Business Innovation Unleashed” campaign. The omni-channel integrated campaign specialist manages the creation and orchestration of full-funnel, omni-channel go-to-market campaigns which may include advertising, nurture, ABM, partner programs, webinars, social media activations, events, etc. They facilitate plan development in collaboration with cross-functional teams, channel owners, and regional teams. They define current and future state experience plans including necessary content and manage/influence program plan execution, optimization and measurement. They help to drive team progress and results. They work in collaboration with cross-functional teams, including Product Marketing, Solutions Marketing, Digital Experience & Demand, Brand and Creative Services, Partner Marketing, Insights & Activations, and Regional Marketing teams. Responsibilities include but not limited to: Develop and drive global full-funnel, omni-channel integrated campaign strategy in support of business marketing objectives, leveraging key market and audience insights.Work cross-functionally with marketing automation, .com, paid media, creative, product marketing, sales, partner marketing, solution marketing and other HQ and regional marketing teams to define digital experience plans and drive aligned integrated go to market programs based on the user journey and audience needs.Develop a deep understanding of Intel technologies and communication vehicles to shape campaign strategy and activation plansPartner with internal and external agency teams to define, develop and deliver creative and content assets to fulfill campaign needs across the audience journey.Oversee campaign execution, optimization and measurement. Qualification for success: Willing to understand and translate product marketing objectives into campaign objectives, develop experience plan and drive cross-functional teams to ensure on strategy and delivering against success metricsExperience in leading and working with and through cross-functional and cross-regional teams at all organization levels.Willing to develop and execute on complex, B2B omni-channel experience plans including advertising, nurture, ABM, lead and demand generation programs, content development, social media activations, partner co-marketing programs, webinars, events, etc.Strong understanding of B2B and B2I commercial and technical audiencesExcellent communication, presentation, and collaboration abilitiesStrong project management and organizational skills with the ability to drive multiple projects at once and manage feedback and expectations across multiple stakeholdersWilling to manage to deadlines, budgets, and launch dates with strong organizational skills.Willing to work in a dynamically changing and often ambiguous environmentExperience managing and driving external agency relationshipsLeadership/executive presentation skillsWilling to initiate and drive opportunities independently, with a strong sense of accountability Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This Position is not eligible for Intel immigration sponsorship. Minimum Qualifications: Bachelor’s or Associates Degree in Business, Marketing, Communications or related field (or equivalent work experience)8 plus years in B2B marketing6 plus years driving campaigns or integrated marketing programs (advertising, website, social, nurture, ABM, demand generation, content marketing, events, etc.) Preferred Qualification: Experience working at a large company within the tech industryKnowledge of Microsoft Teams & Office including PPT, Word and ExcelExperience with Adobe Experience Manager and BrightcoveExperience working in Adobe Workfront Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: Virtual US Additional Locations: Business group:Global Marketing & Communications is responsible for Intel's brand management, end-user product marketing and go-to-market activation strategy for direct and indirect marketing programs worldwide Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, Colorado, New York, Washington, California:$123,139.00-$203,801.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. The application window for this job posting is expected to end by 06/30/2024

Job Details: Job Description: Join the Data Center Operations team as a Cloud Infrastructure Service Delivery Manager! The Cloud Infrastructure Service Delivery Manager leads the team of Business Systems and Solution Analysts, Programming Engineers and other IT professionals engaged in the successful delivery of information systems, products and services to internal customer groups. Ensures to deliver the benefits of cross-organizational capabilities, manages the services and owns the vision of the service line to ensure alignment with evolving business needs. Other responsibilities include but are not limited to: Monitors and reports the KPIs from the service line agreement (SLA) and optimizes the IT service delivery process including business automation processes. Delegates, directs service tasks, monitors the progress of current projects and manages service team members. Provides technical support and coordinates troubleshooting for equipment and networks when necessary. Stays current with latest trends and maintains familiarity with upcoming IT equipment, services, and other developments. Sets priorities for the team, gets results across boundaries, develops employees and manages performance. Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results. Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment. Planning and coordination of diverse groups. Customer relationship engagement and management. Excellent verbal and written communication (experience of working to an exec or director level). Presenting data verbally and in reports. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications The candidate must have a Bachelor's Degree in STEM, Business, or other related degree and 9+ years of experience -OR- a Master's Degree in STEM, Business, or other related degree and 6+ years of experience -OR- a PhD in STEM, Business, or other related degree and 4+ years of experience in: Service, Program and Project Management managing complex, large and multidisciplinary projects/programs. Cloud Technologies and underpinning architectures and services. Technical Program or Project Manager in the past with a strong focus on infrastructure, platform, and service layers. Building service delivery roadmaps and dealing with change and prioritization as the business dictates. Working and presenting at executive and director level. Experience with managing projects in Jira. Agile Methodologies. PMP Certification. KPI Tracking. Leadership Reporting. Large-scale infrastructure operations. Preferred Qualifications Project and Product Management methodologies for schedules, cost, quality, and risks. Product Roadmap and Strategy. Capital and Budget Cycle Process. Business Analyst. Business platforms such as Salesforce, Smartsheet, JIRA, Ariba, and other Intel IT platforms. Experience with transition change management. Previous experience in product management. Job Type:Experienced Hire Shift:Shift 1 (Canada) Primary Location: Virtual Canada Additional Locations: Business group:Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Annual Salary Range for jobs which could be performed in Canada Salary range dependent on a number of factors including location and experience. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.Canada Accommodation:Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.

Job Details: Job Description: Owns critical high volume manufacturing equipment and processes that enable rapid device miniaturization and the mass production of integrated circuits. Conducts tests and measurements of their operations to ensure control over critical dimensions and defectivity of the process line. Recommends and implements modifications for operating the equipment in order to improve production efficiencies, manufacturing techniques and optimizing production output for existing products, to meet safety, quality and cost indicator goals. Grows insitu manufacturing capacity to high volumes to demonstrate the technology capability while simultaneously transferring the technology to counterparts in manufacturing sites across the globe. Owns execution of maintenance and repair activities for equipment and relevant module of components. Initiates and owns the continuous improvement of equipment and process for key performance indicators (e.g., safety, quality, cost, productivity, defects, and yield) and works with equipment suppliers as required. Owns process development line items aligned to high volume process nodes. Participates in the transfer of technology to other sites through training and audit of installation and qualification outcomes to ensure matched processing across sites. Owns development and optimization of excursion prevention systems for the equipment and process. Owns detection of discrepant material or activities of the equipment and process. During factory ramps, owns equipment install/conversion and qualification to ensure tools are installed safely and on schedule, while meeting all quality/matching criteria (from design through Safety Level 1 and Safety Level Supplier milestones, Intel qual and manufacturing readiness processes). Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience. Minimum Qualifications: The candidate must possess at least one of the following degrees plus the years of experience determined for each degree in the areas specified below: Master's degree in physics, Chemistry, Electrical Engineering, Chemical Engineering, Mechanical Engineering, or Material Science.Bachelor's degree in physics, Chemistry, Electrical Engineering, Chemical Engineering, Mechanical Engineering, or Material Science and 1+ years in a semiconductor environment or assembly experience. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Intel is currently undergoing a transformative process to achieve its ambitious IDM 2.0 strategy. This involves expansions of manufacturing capabilities, the establishment of a foundry to cater to both internal and external clients, and the development of a product group dedicated to pioneering the next generation of silicon products for AI and future computing needs. We are seeking a Business Systems Analyst! This position is a techno functional role in IT supply chain materials planning organization to support the business and technical transformation. Other responsibilities include but are not limited to: Identifies business requirements, functional and system specifications that meet business user requirements, maps them to systems capabilities and recommends technical solutions. Configures system settings and options, plans and executes unit, integration and acceptance testing, and creates systems specifications. Identifies test scenarios and cases, executes test cases, documents test results, test scripts and provides quality assurance results to the business. Examines current business procedures, system practices and IT modification design and recommends new improved ones. Designs new computer programs and systems by analyzing business requirements, constructing workflow charts and diagrams, studying system capabilities and writing specifications. Performs troubleshooting, solves complex bug issues in production systems or applications, and collaborates with subject matter experts on issues. Anticipates complex issues and discusses within and outside of project team to maintain open communication. Serves as a technical lead on a subsystem or small feature(s)and applies expertise in subject area to meet deadlines. Ability to work and communicate effectively with technical and cross functional teams within the organization. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications The candidate must have a Bachelor's Degree in Electrical/Computer Engineering, Computer Science or other Engineering related Degree and 6+ years of experience -OR- a Master's Degree in Electrical/Computer Engineering, Computer Science or other Engineering related Degree and 4+ years of experience in: Subject matter expert on Supply Chain supply planning with good understanding of BlueYonder (BY, JDA, i2) ESP module or other similar industry used planning tool. Heuristics. Optimizer. Preferred Qualifications Agile software development methods and tools. SAP ECC/S4 planning. Semiconductor/manufacturing industry. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Business group:Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Responsible for support of cloud systems and solutions that integrate software, firmware, board, and silicon/SoC components with specific focus on customer requirements and implementation limitations throughout the systems lifecycle. May also be responsible for systems architecture and definition, including translating the business opportunity into use cases and developing the product specifications for required hardware and software needed to deliver system requirements. Leads design, analysis, and implementation of component level choices across the integrated cloud systems on performance, features, and cost, including analysis of risks and emphasis on ease of use, reliability, security, availability, maintainability, sustainability, and quality. Defines systems implementation and integration approach and plans to ensure optimum performance and reliability across servers, networks, related utilities, and hardware/software that comprise the cloud infrastructure. Delivers end to end technical solutions to solve customer problems, including deploying solutions, executing benchmark tests, and preparing documentation. Collaborates with other teams to analyze next generation requirements and opportunities and may influence and guide research and academic collaboration in the space of cloud systems and solutions, including proof of concept and solutions beyond current industry approaches. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience -OR- a Master's degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a PhD in Electrical/Computer Engineering or Computer Science and 3+ year of experience in Intel architecture systems, chipsets or accelerators Validation and debug, power/thermal management Experience with interfaces like PCI-Express, DDR4/5 memory interface, SMBUS OR JTAG OS troubleshooting both in Windows and Linux Preferred Qualifications Knowledge of Processor / PCIe / GPU subsystem, including both PCIe HW and driver, BIOS, firmware, manageability Linux kernel experience Networking IP/driver level Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Ohio, Columbus Additional Locations: Business group:Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In Q4 2023, Intel announced Altera will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future. We are a leading global semiconductor company at the forefront of innovation, delivering cutting-edge solutions for a diverse range of industries. As we continue to expand our global team, we are seeking a highly skilled and strategic leader to join our Information Technology team as the IT Program Manager. As a member of the global IT team, you will play a pivotal role in transforming PSG to operate as a standalone business. As an IT Program Manager, you will play a crucial role in leading and overseeing multiple IT projects and initiatives related to information systems within the company. You will collaborate closely with cross-functional teams to ensure successful planning, execution, and delivery of IT programs that align with business objectives and support the company's growth and innovation. Behavioral Traits Strong understanding of information systems, software development lifecycle, IT infrastructure, and emerging technologies. Experience with enterprise-level systems (e.g., either ERP(SAP), HR(Workday), CRM is desirable. Excellent leadership, communication, and interpersonal skills, with the ability to collaborate effectively with diverse teams and stakeholders, and influence decision-making. Strong analytical and problem-solving abilities, with a focus on driving solutions and delivering results in a dynamic and fast-paced environment. Responsibilities include but not limited to: Program Management: Lead and manage IT programs and projects related to information systems, including software development, implementation, upgrades, and integration. Stakeholder Engagement: Engage with stakeholders at all levels to understand business requirements, priorities, and expectations, and ensure alignment with IT programs and initiatives. Planning and Execution: Develop comprehensive program plans, timelines, budgets, and resource allocations, and oversee the execution of IT programs to achieve desired outcomes. Risk Management: Identify, assess, and mitigate risks and issues that may impact program delivery, and implement strategies to minimize potential disruptions. Vendor Management: Manage relationships with external vendors, contractors, and service providers involved in IT programs, and ensure adherence to contracts, SLAs, and quality standards. Quality Assurance: Implement and maintain quality assurance processes to ensure the delivery of high-quality solutions and services that meet or exceed stakeholder expectations. Qualifications:This position is not eligible for Intel sponsorship. Bachelor's degree in computer science, electrical/computer Engineering or related field and 9+ years of experience Minimum of 10 years of experience in IT project or program management Preferred Qualification Master's degree in computer science, electrical/computer Engineering or related field and 6+ years of experience Certifications (e.g., PMP, ITIL). Merger and Acquisition experience Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, San Jose Additional Locations: Business group:The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$141,673.00-$241,005.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: In Q4 2023, Intel® announced Altera® will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel® . This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future. As a FPGA Silicon Design Engineer, you will be responsible for, but not limited to, the following: Develop the system model, algorithm, and subsystems for integration in full chip designs. Participate in the definition of architecture and microarchitecture features of the block being designed. Create prototypes, simulate models, and specify systems requirements. Prepare and design logic diagrams and codes for implementing system design and test specifications. Deliver software models for device level bring up, including user visible functionality, timing, and power. Apply RTL implementation techniques to qualify the design to meet required power, performance, and area goals, partnering with physical implementation team. Review the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Secondary responsibility will be to document final design specifications and features that can be used for customer consumption. The ideal candidate will have the following skills in addition to the qualifications listed below: Excellent written and verbal communication skills. Deep knowledge of ASIC platforms and FPGA platforms. Knowledge of Verilog, System Verilog and System Verilog Assertions Experience with signal processing, algorithms investigation, modelling, and prototyping. Must have experience in hardware acceleration targeting FPGAs (automated and manually implemented) IP development (IO peripherals, DMAs, external memory controllers, etc…) Interconnects architecture definition (APB, AXI, Avalon, etc..) Embedded system design (HPS hardware and Nios II/V hardware + baremetal) Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Requirements: Bachelor’s degree in electrical engineering, computer science, or related field. 9+ years of experience in system modeling or system design. 9+ years of experience with gathering requirements and creating design specification documents. 9+ years of experience in RTL design for ASIC and FPGA. Additional Preferred Qualifications: Experience in Git or GitHub revision control system. Job Type:College Grad Shift:Shift 1 (United States of America) Primary Location: US, California, San Jose Additional Locations:US, Oregon, Hillsboro, US, Texas, Austin Business group:The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,041.00-$259,425.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a SStructural Design (Physical Design) Engineer - Lead your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Structural Design (Physical Design) Engineer - Lead will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 9+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 7+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 4+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,041.00-$259,425.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Our Product Security and Assurance team is seeking a highly motivated Computer Science Undergraduate Intern to join our efforts in implementing the FIPS 140-3 standard and supporting our business units in integrating these specifications into their products! The Undergraduate Intern will also contribute to the operation of our Cryptographic and Security Testing (CST) Lab and the development of its tools, playing a vital role in enhancing our security posture. As part of our team, you will gain hands-on experience in the field of product security, working alongside industry experts to ensure that our products meet the stringent requirements of FIPS 140-3. This internship offers a unique opportunity to be at the forefront of security technology and to make a tangible impact on the security features of our products. What you'll do: You will assist in the execution of the FIPS 140-3 program, collaborating with technical experts and business units to facilitate their certification efforts. Your role will involve a blend of technical and communication tasks, ensuring that our cryptographic products are designed to be FIPS 140-3 compliant. Responsibilities may be quite diverse of a software technical nature. Experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications The candidate must be pursuing a Bachelor's Degree in Computer Science, Computer Engineering, or a related field and 3+ months of experience in: FIPS, NIST SP 800, ISO/IEC publications on cryptography (e.g., FIPS 140-3, ISO/IEC 19790). Building software on GitHub or other repositories. Application security testing. This position is not eligible for employment-based Visa/Immigration sponsorship. Intel sponsors individuals for employment-based Visas for positions where we experience a shortage of US Workers. These skills shortage roles are typically STEM contributing positions requiring a Master's or PhD degree, or a Bachelor's Degree with three years related job experience. This position does not qualify for Intel Sponsorship because it is either (1) a nonSTEM contributing position, or (2) a STEM position that only requires a Bachelor's Degree and less than three years' experience. Preferred Qualifications Cryptographic modules and security testing. Participation in cybersecurity competitions or relevant extracurricular activities. Software development and scripting languages (e.g., Python, C/C++). Prior internship or project experience in a cybersecurity or product security role. Job Type:Student / Intern Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, California, Folsom, US, Texas, Austin Business group:Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$40,000.00-$108,000.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Creates methodologies, models, and flows for advanced design rules for a specific process node and characterizes those models through silicon validation. Ensures IP and SoC design meets requirements and standards for a specific manufacturing process technology. Identifies ways to optimize silicon designs by evaluating device performance over a range of operating conditions. Resolves prototype issues and determines whether problems are design or process related. Conducts experiments to identify potential challenges in the process and ensure that the process meets yield, quality, and reliability standards. Drives continuous improvements to enhance the designs, materials, and methodologies. Designs, validates, and characterizes analog building block devices and template cells. Disseminates process development information to design groups, ensures it meets future product requirements, and extracts necessary technical and device performance data for IP and SoC designs. Works with IP and SoC design teams to capture and optimize process requirements to enable competitive designs and products. #DesignEnablement Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: - Candidate must possess a MS degree with 2+ years of experience or PhD degree with 1+ years of experience in Electrical, Computer Engineering, or related field. Experience in the following: - Experience in using Synopsys Fusion compiler, ICC2, DC or Cadence Innovus, Genus. - IP/SoC physical design optimization and methodologies for optimal Performance, Power, Area and Cost (PPAC). - Experience driving physical design EDA tools, design reference and sign-off flows in advanced process technologies, DTCO PPA and EDA vendor engagement. - Low-power and multiple clock domain design. - Scripting skills using a programming language such as Python, TCL, etc. Preferred Qualifications: Experience in the following: - Transistor theory related to latest process technologies. - Developing and maintaining design flows from synthesis to signoff. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations:US, Arizona, Phoenix, US, Oregon, Hillsboro Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$123,419.00-$185,123.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In this role, you will lead one or more Platform Software Execution Teams (PSXT) on technology development for Intel® Xeon® platforms in the Data Center and AI Group (DCAI). The key functions of the role will be to: Manage the platform Firmware/Software (FW/SW) execution across all ingredients from fundamental microcode/BIOS to above the OS SW stack for different market segments throughout the all the phases of product/technology. Development, from pre-silicon to launch until sustaining transition. Engineering change request assessment/commitment from FW/SW point of view across Intel® Xeon® PSXT teams. Be the program's FW/SW One-Voice for FW/SW Readiness; in addition, be the program's primary escalation point for customer support issues related to platform FW/SW and/or ecosystem enabling. Drive Intel® Xeon® platform FW/SW to meet quality criteria through Product Life Cycle milestones to ensure timely delivery with high quality and performance. This includes, e.g. being the gatekeeper for milestone feature changes/bug-fix check-ins. ManageIntel® Xeon® platform FW/SW risks/issue resolution and escalations, including proactively initiating/driving task forces as situations need drive. The ideal candidate should exhibit the following Behavioral Traits Leadership and influence skills. Build respect and influence across a diverse cross-organizational development team without having solid-line people management authority. Strong analytical, planning, and problem-solving skills in complex paradigms. Excellent interpersonal skills, including building and maintaining new work relationships with diverse stakeholders, working as a team, and working through differing inputs and opinions to arrive at optimal and agreed-upon solutions to achieve goal alignment, execution planning and tracking. Excellent verbal and written communication skills, including listening skills. Communicate with and influence senior technical leaders and senior managers. Qualifications:Minimum Qualifications Bachelor's degree in computer science, electrical engineering, or equivalent with strong technical/engineering and + 12 years of experience. Technical/engineering experience and acumen on FW/SW. Experience with integrated platform/systems, Firmware/Software development, platform/system development and/or system debug. Experience with SOC micro-codes, Intel validation methodologies, tools, and environment and/or silicon development. ​ Preferred Qualifications Master's degree (M.S., MBA) or equivalent in Electrical Engineering, Computer Science applications/ecosystems with + 10 years of experience. Experience with server systems, workloads on AI and/or other data center. Experience with SW layers above the OS like Virtualization, Containers, Orchestration, Middleware, etc. Experience with Intel® Xeon® platforms in the various segments of the industry like HPC, AI, Edge, Cloud, etc. Experience working with complex platforms and demonstrating customer centric proof points and Workloads. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,041.00-$259,425.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Structural (Physical) Design Engineer Design your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Structural (Physical) Design Engineer will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 8+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 6+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 3+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$144,501.00-$217,311.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Structural (Physical) Design Engineer / Full Chip STA Timing Engineer, your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Structural (Physical) Design Engineer will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 6+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 4+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 1+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$123,419.00-$185,123.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About the Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. Foundry Technology Development (TD) is the heart and soul of Moore's Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth. TD's more than 10,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona. You will be a key member of the growing Design Enablement Application and Support team and will own significant customer enablement tasks in a fast-paced and technically challenging environment. Job Description: Design Automation engineer will develop and maintain complex infrastructure and automation for Integration QA of Foundational IP, consisting of Standard Cell Libraries, Memory Compilers, Custom Embedded Memories and AMS IP developed by RnD teams at Intel Foundry. This work is critical for ensuring that we can execute SoC design workflows across the breadth of the Intel Foundry EDA and IP offering. The solutions developed by Design Automation engineering team must be robust, scalable, easy to debug and generate reproducible results. Integration QA workflows will include significant design data analytics component. The responsibilities will include: Development of requirements, specifications and design automation solution architecture. Manage development of QA workflows, including integration of EDA tools, workflow testing and release strategies. Manager support of the internal Design Enablement teams executing integration QA, including debugging of issues in the workflow execution. Guide KPI definition and implementation of data analytics solutions for QA execution results, regression vs. previous iterations, workflow bottlenecks. Coach the team members in proactive identification and resolution of issues, work on continuous improvement of usability, runtime, storage optimization, and ways to improve test coverage. Foster close collaboration with RnD and Application Engineering team on identifying and addressing gaps in QA. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Candidate must possess a BS degree with 6+ years of experience or MS degree with 4+ years of experience or PhD degree with 2+ years of experience in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering or a related STEM field. Managing Design Automation teams in one of the following domains: SoC Design or IP Design or FIP development and QA. Experience in one or more of the following EDA domains: Front End Design or DFT or Synthesis and Layout or RV or Sign Off. Hands on experience with one or more EDA tool stacks: Synopsys or Cadence or Siemens EDA. Software development skills: TCL and Python programming. Deep understanding of foundations of software architecture and design, testing and deployment methodologies. Preferred Qualifications: Docker, VirtualBox, cross-platform application testing and deployment. Familiarity with project management best practices. Understanding of SoC and IP design and verification workflows. Jira Software platforms. Design and sign off on advanced process nodes, including statistical timing analysis, OCV. Understanding of IP QA and acceptance practices. Foundational IP domain. Cloud EDA. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, Austin Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,041.00-$259,425.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Full Chip Timing Engineer - Lead / Structural (Physical) Design Engineer your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Structural (Physical) Design Engineer will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 9+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 7+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 4+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,041.00-$259,425.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Structural Design (Physical Design) Engineer - Lead your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Structural Design (Physical Design) Engineer - Lead will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 9+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 7+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 4+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,041.00-$259,425.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Structural (Physical) Design Engineer your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Structural (Physical) Design Engineer will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 8+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 6+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 3+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$144,501.00-$217,311.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Staff Structural (Physical Design) Engineer - Floorplanning your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Staff Structural (Physical Design) Engineer - Floorplanning will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 8+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 6+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 3+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$144,501.00-$217,311.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at IntelIntel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. As a Senior Structural (Physical Design) Engineer your responsibilities include: Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing.Conducts all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.Analyzes results and makes recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams.Possesses CPU specific expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, structured placement, routing, synthesis, and DFT.Works intimately with industry EDA vendors to build and enhance tool capabilities to design a highspeed, low power synthesizable CPU.Optimizes CPU design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. The Senior Structural (Physical Design) Engineer will exhibit behavioral traits that demonstrate: Excellent verbal and written communication and collaboration skills.Strong communication and collaboration skills, including a willingness to work with others, and the ability to tolerate ambiguity and highly complex decision environments. Qualifications:What we need to see (Minimum Qualifications): Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The candidate must have a Bachelor's degree in Computer/Electrical Engineering or Computer Science and 8+ years of experience -OR- a Master's Degree in Computer/Electrical Engineering or Computer Science and 6+ years of experience -OR- a PhD in Computer/Electrical Engineering or Computer Science and 3+ year of experience with the following: Experience with owning the full chip and block level timing analysis and closure.Hands-on experience with industry standard Cadence or Synopsys tool suite (Star-RC, Primetime, Quantus, Tempus etc.). How to Stand out (Preferred Qualifications): Prior experience with Full-Chip and (or) partition level physical design (APR digital logic). RTL to gds2 flow and basic device physics. Scripting with tcl, perl, shell etc. to solve the basic design problem. Internal flow development and understand nuances of Physical Design (Structural Design) flow. Experience with 7nm technology or below. Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits #IFS Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$123,419.00-$185,123.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Join Intel-and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So join us-and help us create the next generation of technologies that will shape the future for decades to come. Corporate Services (CS) touches the lives of every Intel employee every day. CS creates an environment where employees can prosper while creating the innovative technologies that make amazing possible. Our scope is vast and includes operating and maintaining all Intel sites, offices, labs and factories globally as well as onsite services and onsite services and experiences that help employees stay safe and productive. CS also helps to make Intel and our community a greener place by supporting Intel's commitment to environmental sustainability, including investing in conservation projects, setting company-wide environmental targets and driving reductions in greenhouse emissions, energy use, water use and waste generation. In addition, CS approaches Diversity & Inclusion with the same rigor, accountability and visibility as our critical business strategies, embedding diversity and inclusion practices in everything we do! We are responsible for building an environment where all employees feel empowered to achieve their full potential. We are a global workforce that generates diversity of thought and innovation, resulting in better overall business results. Corporate Services values and embraces individual uniqueness and empowers employees to bring their whole selves to deliver their very best. We thoughtfully embed inclusivity and diversity as core strengths in our hiring, career development and training practices. Corporate Services’ success depends on our people and we highly value our amazing employees. Make Corporate Services your workplace of choice today! As a Facilities Engineer - your responsibilities will include but are not limited to: Deliver best in class facilities performance thru equipment sustaining support for safe uninterrupted factory operations while reducing operating costs Own facilities system documentation and maintenance strategyDevelop and edit technical documents including operating documents, job plans, and troubleshooting documentsDaily planning and coordination of work with engineering and technician teamsProvide direct support and maintain periodic communication with key suppliers to ensure the latest and most cost-effective solutions are implemented and that technical accuracy is maintained in master specifications and standardsCommunicate and collaborate with people in different levels of the organization including engineering group leaders, operations Group Leaders, facilities TD engineers and others as neededBecome an expert in tool hardware, maintenance, process, and critical outputs Provide support for multiple projects with minimal supervisionProvide engineering support and technical guidance to various construction and sustaining facility design teams Participate in design reviews as needed to evaluate design, construction, and installation methods Rotational on-call responsibilities in a 24x7 manufacturing environmentLead in planning, design, reconfiguration, construction, maintenance, and modifications of Intel's manufacturing facilities systemsDevelop and execute strategic initiatives for safety, quality, and/or reliability of facilities systemsSupport construction projects for cost efficiencies, reliability improvements, or capacity upgrades to meet customer needsReview system parameter trends and weekly Process Control Systems Analysis (PCSA) to check the health of facilities systemsRead and interpret design drawings and specifications for facilities systemsUtilize the Corporate Services business processes such as Model-Based Problem Solving (MBPS) technique and After Action Reviews (AAR), for evaluating root cause, contributing factors, and improving facilities systemsRole model field presence and leadership to cultivate collaborative relationships with team membersOnsite presence will be required based off facilities system needs The successful candidate should exhibit the following behavioral traits: Analytical skills Role modeling safety behaviorsInfluencing team membersOrganization and time management and project management skillsWillingness to excel as an individual contributor and part of a team and work effectively across multiple facilities operations disciplinesWritten and verbal communication skillsTeam playerPresentation skills to communicate to technical and non-technical audiences Willingness to solve complicated problemsWillingness to work on diverse tasks in an ambiguous environmentSafety commitment and a demonstrated safety role modelSkills with MS Office Suite Outlook Word ExcelSystem troubleshooting skills What we offer: We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth. As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment-where the brightest minds in the world come together to achieve exceptional results. We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs and amenities, flexible work hours, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work.We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Position not eligible for Intel immigration sponsorship. Minimum Qualifications: The candidate must possess at least one of the following degrees plus the years of experience determined for each degree in the areas specified below: Bachelor's degree in Electrical Engineering, Instrumentation and Controls Systems, Mechanical Engineering, Computer Science, Chemical Engineering, Chemistry, Environmental Engineering, Physics, Civil Engineering or related scientific STEM fields with 2+ years of experience.Master's degree in Electrical Engineering, Instrumentation and Controls Systems, Mechanical Engineering, Computer Science, Chemical Engineering, Chemistry, Environmental Engineering, Physics, Civil Engineering or related scientific STEM fields with 1+ year of experience.PhD degree in Electrical Engineering, Instrumentation and Controls Systems, Mechanical Engineering, Computer Science, Chemical Engineering, Chemistry, Environmental Engineering, Physics, Civil Engineering or related scientific STEM fields. Job Type: Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$92,847.00-$148,355.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Join Intel-and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So join us-and help us create the next generation of technologies that will shape the future for decades to come. Corporate Services (CS) touches the lives of every Intel employee every day. CS creates an environment where employees can prosper while creating the innovative technologies that make amazing possible. Our scope is vast and includes operating and maintaining all Intel sites, offices, labs and factories globally as well as onsite services and experiences that help employees stay safe and productive. CS also helps to make Intel and our community a greener place by supporting Intel's commitment to environmental sustainability, including investing in conservation projects, setting company-wide environmental targets and driving reductions in greenhouse emissions, energy use, water use and waste generation. In addition, CS approaches Diversity & Inclusion with the same rigor, accountability and visibility as our critical business strategies, embedding diversity and inclusion practices in everything we do! We are responsible for building an environment where all employees feel empowered to achieve their full potential. We are a global workforce that generates diversity of thought and innovation, resulting in better overall business results. Corporate Services values and embraces individual uniqueness and empowers employees to bring their whole selves to deliver their very best. We thoughtfully embed inclusivity and diversity as core strengths in our hiring, career development and training practices. Corporate Services’ success depends on our people and we highly value our amazing employees. Make Corporate Services your workplace of choice today! As a Facilities Technician your responsibilities will include but are not limited to: Role model safety as a an Intel cultural value Operate and maintain facilities systems that support Technology Development (TD) facilitiesPerform routine preventative and corrective maintenance proceduresUtilize Maximo Maintenance planning softwareAssignments are semi-routine in nature with work performed within generally defined parametersSome degree of judgment is required in resolving non-standard problemsWork alongside an engineering team to enable the Factories to operate optimallyInteract with the factory and other customers and stakeholders The successful candidate should exhibit the following behavioral traits: Written and verbal communication skillsOrganization and time management skillWillingness to excel as an individual contributor and part of a team Work across multiple facilities operations disciplinesRole model safety as a value and adhere to stringent environmental compliance cultureWillingness to work a compressed work week schedule: Opportunities available for Nights and Days. What we offer: We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth. As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment-where the brightest minds in the world come together to achieve exceptional results. We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs and amenities, flexible work hours, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work.We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Position not eligible for Intel immigration sponsorship. Minimum Qualifications: The candidate must have at least one of the following: Associate of Art or Associate of Science degree in HVAC, Mechanical, Chemical, I&C (Instrumentation and Controls), Electrical, Plumbing, Gas Fitting, Industrial Maintenance Mechanic, Facilities Maintenance Technology, Microelectronics, Renewable Energy Technology, Water and Environmental Technology, Water / Purification, Industrial Process Operator, Automotive Service Technology, or related technical or STEM field.Military service plus 1+ years of work experience in Mechanical Systems, Ultra-Pure Water, Wastewater System Operations, Facilities Maintenance, Controls Systems.1+ year of experience in any of the following:Maintenance (i.e.. pumps hydraulics, piping)Mechanical systemsElectrical systems (​​​For Oregon Locations: An active Journeyman Electrician License from State of Oregon OR Oregon reciprocal agreement for journeyman electrician license from the states on Arkansas, Idaho, Maine, Montana, Utah, Washington or Wyoming)Ultra-Pure WaterWastewater system operationsPlant operator or field equipment technicianControls Systems Job Type: Shift:Shift 5 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Santa Clara Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$63,170.00-$91,840.00 (Hourly Role) Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: In this role responsibilities include, although not limited to: Oversees all stages of product creation, with an emphasis on execution, including design and development, developing user stories, defining the north star vision for the team's product, creating a product road map, and prioritizing the product backlog. Works closely with relevant stakeholders to create the right product vision. Defines user stories and prioritizes the team backlog to streamline the execution of program priorities while maintaining the conceptual and technical integrity of the features or components for the team. Participates in all scrum ceremonies: backlog grooming, release and sprint planning, and retrospectives as required. Utilizes knowledge of agile and scrum practices, business needs, key market trends, and customer requirements to create and prioritize features, user stories, acceptance criteria and product backlog for each sprint. Communicates the product backlog clearly to all team members and influences the focus areas for delivery teams. Ensures that the team understand all components of product backlog to proceed. Actively engages with the delivery teams to collaborate, negotiate, and commit to product requirements. Evaluates the work done by delivery team and provide constant feedback to build an exceptional product. In addition to the qualifications listed below, the ideal candidate will also have: Demonstrated skills to work independently and deliver results in a dynamic, cross functional, team-oriented environment. Excellent communication skills to work across a globally diverse set of teams and customers. A self-starter with strong analytical and critical thinking skills to learn and apply. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly. Minimum Qualifications: The candidate must have a bachelor’s degree in electrical/computer engineering or computer science and 1+ year of experience -OR- a master’s degree in electrical/computer engineering or computer science and: Salesforce CRM System Administrator Certification. This position is not eligible for Intel immigration sponsorship. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Folsom Business group:Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$74,700.00-$108,158.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.