Intel

Job Details: Job Description: Intel plays a key role in any data-centric initiative in the world, providing technologies that enable our customers to innovate and compete, effectively changing the world. As an Offensive Security Researcher at Intel, you will lead complex, multi-disciplinary security research projects using your research expertise. STORM (Strategic Offensive Research amp Mitigation) is a multidisciplinary team in Intel's IPAS Security Research team, focusing on offensive security research and development of new mitigation strategies and tools. As a team member, you will have the choice of contributing in one or more of the following areas: - Finding complex, high-impact security vulnerabilities in hardware, software, firmware, by doing in-depth evaluation of designs from a white-box perspective - Researching and prototyping (writing PoCs) for new classes of attack vectors and vulnerabilities, including side-channels - Researching and developing tools for finding and mitigating issues at large scale, both in software and hardware - Creating novel software and hardware mitigations for existing and new classes of attack vectors - Reviewing hardware (RTL) and micro architectural features to search for possible new attack vectors Our projects and engagements are usually multidisciplinary, and you will be collaborating with other security researchers and product development teams. You will also have great opportunities to learn about novel research topics, as well as cutting-edge CPU and hardware technologies. Technical excellence and hands-on experience are the primary requirement for this role, in which you will be able to contribute according to your skill set and areas of interest. It is not required to have advanced knowledge in Intel-specific technologies. Qualifications:Bachelors, Masters degree or PhD in Computer Science, Electrical Engineering, mathematics, physics or relevant domains This position requires minimum 5+ years experience or knowledge of 2 or more of the following topics: Advanced knowledge of computer architecture Hardware (RTL) design, ability to understand RTL designs CPU micro-architecture and microcode Advanced software compiler knowledge or development experience Proof of Concept/exploit writing Software development experience in C/C++ Source code review for finding security issues Knowledge of side channel attack vectors, including transient execution and physical attacks Preferred qualifications: Ability to work autonomously with minimal supervision Knowledge of both hardware and software security Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Virtual Israel Additional Locations: Business group:Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Artificial Intelligence Solutions Group: Transforming Intel with AI AI solutions group is looking for a Hiring Student to source, attract, evaluate and recruit qualified candidates for various positions and seniority levels. If you are interested in being part of our cutting edge team, take part in one of the critical assignments of every organization and you have true passion for people and process we want to meet you (the sooner the better). Responsibilities: � Coordinate with hiring managers to identify current and future hiring needs � Advertise and source candidates � Attend job fairs and organize in-house recruitment events � Manage candidates' information Qualifications:� Student that currently registered to or pursuing an B.A/M.A degree in Human Resources, Consulting and Organizational Development or related field. � Experience with interviewing and evaluating candidates - an advantage � Highly organized with strong attention to detail, documentation, and accuracy � Excellent communication skills � Strong capability working with all Microsoft tools: Outlook, Excel, PowerPoint and Word � Strong listening, evaluating and problem-solving skills with the ability to collaborate with others and meet deadlines � Availability for 4 working days � Location: Petah Tikva/Haifa #AIHIRING Job Type:Student / Intern Shift:Shift 1 (Israel) Primary Location: Israel, Petah-Tikva Additional Locations:Israel, Haifa Business group:Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About Technology Development: Technology Development (TD) is the heart and soul of Moore's Law at Intel. TD has enabled Intel to create world-changing technology that enriches the lives of every person on earth. TD's more than 13,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona. Intel Foundry is developing the next generation of silicon solutions to enable tomorrow's computing solutions. Within Intel Foundry, Logic Technology Development (LTD) creates and perfects each process technology node. About the Role: As a principal engineer, you are recognized as a domain expert who influences and drives technical direction across Intel and the industry. You develop and mentor other technical leaders, grow the community, act as a change agent, and role models Intel values. You also align organizational goals with technical vision, formulates technical strategy to deliver leadership solutions, and demonstrates a track record of relentless execution in bringing products and technologies to market. The Principal Engineer in LTD, has the following responsibilities: Defines roadmaps to meet requirements, goals and milestones for incoming technology transfer.Defines and establishes flow, procedures, and equipment configuration for the module.Extracts insights from structured and unstructured data by quickly synthesizing large volumes of data, and applying statistics and machine learning, and may using coding techniques (e.g. SQL, python, etc.) primarily, but could also include programming languages (i.e. .net).Owns sustaining and continuous improvement of quality and integrated defect and parametric measurements in startup and high volume manufacturing environment.Drives low yield analysis and yield improvement activities with both internal and external stakeholders.Ensures continuous improvement programs are in place to prevent quality, line yield, and sort yield excursions.Performs quality and reliability risk assessments for potentially discrepant manufacturing material as well as for process changes. Qualifications:Bachelors, Masters or Ph.D. in Engineering or equivalent field12+ years of experience in the semiconductor industry8+ years of advanced metallization development experienceDeep expertise in one or more of the following domains:HiK / gate oxide integrationWorkfunction control integration, with special focus on variation reductionContact and gap fill experience in non-Cu metalsDamascene electroplating development Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Do you want to collaborate with the best minds in the world? Are you passionate about AI and its potential in transforming the future of computing? Come intern with our team this summer. In this undergraduate internship you will be working alongside a world-class SoC design team within the Xeon Engineering Group (XEG) delivering on next-generation Xeon products/IPs for server markets, with a focus on AI enabling SOCs. The internship duration is 3 months. Your responsibilities will include but not be limited to: Block-level floor planning. Logic synthesis of design blocks. Utilize AI in targeted areas to improve designs. Formal Equivalence Verification (FEV), Auto Place-and-Route (APR) using Synopsys ICC tools. Timing verification using Synopsys Prime Time. Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for. Manufacturability checks DFM. Assist in the preparation of the layout design database for introduction to manufacturing. Participate in the design and development of AI enabling SOCs. Willingness to work independently and at various levels of abstraction. The ideal candidate must exhibit the following skills and behavior traits: Excellent communication and teamwork skills. Strong analytical and problem-solving skills. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. Minimum Qualifications Candidate must be pursuing a bachelor's degree in electrical or computer engineering, or a related field. 3+ months of experience/coursework with: CMOS transistor level circuit fundamentals. VLSI hardware design and programming. Preferred Qualifications 3+ months experience or coursework with: RTL/Logic design Verilog, VCS, etc. Electronic Design Automation tools, flows and methodology. ICCDP, Design Compiler, IC Compiler/ICC, Primetime, VCS, Verilog. Layout cleanup expertise DRCs, density, etc. Circuit design. Computer architecture. Python, TCL, Perl and/or C++ programming. Job Type:Student / Intern Shift:Shift 1 (United States of America) Primary Location: US, Massachusetts, Hudson Additional Locations:US, Colorado, Fort Collins Business group:Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, Colorado:$40,000.00-$108,000.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. The application window for this job posting is expected to end by 06/03/2024

Job Details: Job Description: This is a compliance role within Intel's Global Environmental, Health, and Safety (EHS) organization, providing ownership and support ensure Intel complies with all local and national EHS regulations and Intel EHS standards at Intel facilities in California. The successful candidate will be responsible, but not limited to: Provides ownership and support to ensure Intel complies with all local and regional environmental health and safety (EHS) regulations and to all Intel EHS standards.Provides support for the safety and wellbeing of all workers including delivery and management of all safety programs, EHS incident investigations, root cause analysis, corrective action plans, submittal of environmental permitting, licenses, certifications, and external reports, environmental risk assessments, and safety hazard assessments.Coordinates the monitoring of workplace environments and is responsible for the recognition, evaluation, and control of those environmental factors or stresses arising in or from the workplace that may cause sickness, impaired health, or injury among the employees and/or citizens of the community.Manages and eradicates EHS operational risks and hazards and conducts audits to identify risks, ascertain ways to mitigate them, and establish their environmental impacts using both observations and tests.Ensures compliance with EHS procedures and protocols and stays up to date with any changes in the regulations and industry practices with respect to EHS.Investigates accidents to identify their causes and find ways to prevent them in the future and drafts inspection reports to document inspection findings.Maintains records of employee exposure to physical and chemical hazards as required.Provides oversight for EHS training to ensure employees understand emergency procedures, workplace safety, and how to prevent health problems.Provides environmental expertise during emergency events, maintaining environmental permits, classifying hazardous waste, and advising on sewer discharge and storm water program compliance.Perform routine data analysis to support internal and external reporting requirements.Monitor equipment operation and maintenance to establish compliance management programs.Review the use of new chemicals for environmental impacts, develop solutions to mitigate the risk of utilizing chemicals, and approve their use as appropriate.Represent Environmental in project reviews, pre start up environmental reviews, and environmental risk reviews.Conduct surveys of environmental compliance status to identify opportunities for improvement. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship. Minimum Qualifications: The candidate must have at least one of the following: Bachelor's degree in any field of engineering or any other relevant sciences like environmental science or industrial hygiene, with 3+ years of work experience in at least one of the following: Environmental compliance, including large quantity generator hazardous waste management, hazardous materials reporting, wastewater compliance, and refrigeration appliance recordkeeping. Safety compliance, including fatality prevention programs and fire safety.Industrial Hygiene compliance, including chemical and physical exposure assessments, radiation, and PPE programs. Or, Master's degree in any field of engineering or any other relevant sciences like environmental science or industrial hygiene, with 2+ years of work experience in at least one of the following: Environmental compliance, including large quantity generator hazardous waste management, hazardous materials reporting, wastewater compliance, and refrigeration appliance recordkeeping. Safety compliance, including fatality prevention programs and fire safety.Industrial Hygiene regulations, including chemical and physical exposure assessments, radiation, and PPE programs. Preferred Qualifications: Regulatory experience with NFPA, CA Fire Code, NIOSH, ACGIH, CalOSHA, CalEPA, DTSC, BAAQMD, City of Santa Clara, Santa Clara County.3+ years of experience in the application of sound engineering principles and technical problem-solving.3+ years of experience in communicating technical EHS requirements in an accurate, clear, and streamlined manner. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$92,847.00-$148,355.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below! Life at IntelDiversity at Intel As an CIT RTL verification you will be responsible for developing and debugging RTL level description of high performance and low power microprocessor. Build and develop validation test plans and test scenarios to prove the correctness of the designDevelopment of validation components for a simulation based environment, bus functional models, trackers, checkers, scoreboards, and testbenchesImplement direct and random test base on test plan documentationPerforming and debugging simulationsDevelopment of functional coverage and achieving coverage goalsIdentifying and driving to closure of bugs, Developing methodologies and capabilities, and driving process improvementsWorking closely with RTL engineers, micro-architects, and other team members to ensure high quality of test plans, functional coverage, and testsAbility to deliver high-quality output against deadlines and able to work effectively in a cross-site team environment. Qualifications:What we need to see (Minimum Qualifications): Bachelor's degree in Computer Science/Engineering and/or Electrical Engineering and 1+ years of relevant working experience OR Master's degree in Computer Science/Engineering and/or Electrical Engineering.1+ years’ experience with digital logic design, IP/SoC architecture and microarchitecture.1+ years’ experience with OVM/UVM environment, developing testplans/testbenches, C-based transactors, and writing/debugging assembly-based tests.1+ years’ experience with using an interpretive language such as Perl, Python or Ruby. How to Stand out (Preferred Qualifications): 1+ years’ experience with advanced verification techniques such as formal and assertions.1+ years’ experience with in C or C++ programming Experience in Post-Si bring-up Amazing Benefits! Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel’s benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits Job Type:College Grad Shift:Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: Business group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$91,500.00-$137,436.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. As a GPU Design Verification Engineer, responsibilities will include, but are not limited to: Develops the logic design, register transfer level (RTL) coding, and simulation for Display graphics IP required to generate cell libraries, functional units, and the IP block for integration in full chip designs. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports customers to ensure high-quality IP integration. Behavior skills we are looking for: Good verbal/written communication skills. Effective team player with continuous learning mindset. Be willing to balance multiple tasks. Prior experience in IP development teams would be an added advantage. Qualifications:This is an entry level position and will be compensated accordingly. You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research and relevant previous job and/or internship experience. Minimum Qualifications: Bachelor of Engineering degree in Electronics or Computer Engineering and 1+ years experience or Master degree and 2 or more of the following: Aware of synthesis, gate count estimation, static timing analysis and structural design would be an added advantage. Exposure to CPU or GPU Architecture (Computer Architecture Knowledge). Debug Experience with industry standard frontend design and verification flows, tools and methodology. Programming / scripting languages like C/C++, Python, Perl, or Shell scripting automation methods. Preferred Qualifications: Knowledge in UVM, Digital Logic Design and OOP language(Python/C++). A basic problem solving skill is appreciated. Need to have good verification/validation skills. Job Type:College Grad Shift:Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$91,500.00-$137,436.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, come join us to do something wonderful. Intel's Test chip group is looking for a Physical Design Engineer to contribute in the test chip integration domain working with IP partners. We are designing innovative solutions across multiple technologies and unique architectures that fuels Intel's servers, clients, and graphics microprocessors. You will collaborate with architects, logic designers, and analog engineers in evaluating implementation details of complex design features. You will perform all aspects of the SoC design flow from high-level design through synthesis, place and route, timing analysis and power reduction. Your responsibilities may include but not be limited to: Family and/or block-level floor planning, Power supply and power grid planning and analysis, Logic synthesis of design blocks. Formal Equivalence Verification (FEV), Clocking network planning and analysis, Auto Place-and-Route (APR) using Synopsys ICC tools. Timing verification using Synopsys Prime Time, Physical verification - Layout vs. Schematic (LVS), Design Rule Checks (DRC), Electrical Rule Checks (ERC) Design for Manufacturability checks (DFM), Reliability Verification Debug and resolution of integration issues at parent level. Complete design reviews and design signoff flows and assist in the preparation of the full-chip layout design database for introduction to manufacturing. In addition to the qualifications listed above the ideal candidate will also have: Excellent analytical and problem-solving skills. Strong verbal/written communication skills. Effective team player with continuous learning mindset. Willingness to balance multiple tasks. Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process. Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications: Candidate will be pursuing a Master's degree in Electrical Engineering or Computer Engineering. Coursework in: SoC Design Flows: Experience with industry standard EDA tools (i.e. Synopsis, VLSI circuits, design techniques, and sub-micron CMOS technologies. Scripting skills using a programming language such as Perl, TCL, or Python. Preferred Qualifications: Computer architecture and logic design fundamentals. Hardware description languages such as Verilog or System Verilog. Job Type:Student / Intern Shift:Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: Business group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Intel is in the midst of a transformational journey to deliver on its ambitious IDM 2.0 strategy which includes significant manufacturing expansions and the creation of a foundry business to serve internal and external customers. This position is a critical new role in our overall transformation coordinating across our new Intel Foundry business. The End-to-End Business Analyst will focus on aligning business requirements and process designs to enable our new strategy and ensure integration across process towers (Order to Cash (OTC), Forecast to Stock (FTS), Procure to Pay (PTP), and Finance (FPR)), both within our Intel Foundry business, and with the rest of Intel. This position will work closely with our SAP S/4 and planning system implementation teams to influence design decisions and ensure a seamless, end-to-end solution. We are looking for candidates with a breadth of experience in business operations spanning customer service, planning, and execution, ideally in semiconductors or a contract manufacturing environment. If you are looking for a role that gives you the opportunity to influence and shape Intel's future, then this is the role for you. This role will work closely with the Sr. Director, End-to-End Integration to deliver desired capabilities. Responsibilities may include but are not limited to: Works closely with the End-to-End team to define our operating model and associated processes and decision rights Identifies issues and gaps vs. end-to-end capability road map. Identifies potential disconnects between process towers and organizations Advocates for the end state vision in working sessions across the larger team Develops materials and communicates design decisions across the organization. Works with stakeholders to ensure awareness and alignment Supports the End-to-End team in developing guidelines and guardrails to govern design and identifies potential "out of bounds" situations. Analyses data as needed to support decision making. Supports process design and documentation as needed. The ideal candidate should exhibit the following Behavioral Traits: Well-developed written and verbal communication skills. Able to communicate new concepts and build understanding across the organization. Excellent teamwork skills and ability to work with cross-functional, global teams. Organizational/project management skills, ability to work within the Program Life Cycle and support key tasks. Self-learner with ability to identify and prioritize needed work with limited direction. Advanced knowledge of Microsoft Office (Word, Outlook, Excel and PowerPoint). Work in a highly matrixed collaborative team. If you are passionate about improving processes, turning a vision into reality, and are looking for a challenging role in a fast-paced environment, we would love to hear from you. Apply now to join our dynamic team and help us drive innovation and growth in Intel's supply chain. Qualifications:Candidates should possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This position is not eligible for Intel immigration sponsorship. Minimum Qualifications: Bachelor's degree in Supply Chain Management, Industrial Engineering, Business Administration, or a related field of study; Candidate must have 3+ years of experience in the following: - consulting or operating roles in products companies - business transformation, process improvement, and change management Candidates can expect up to 25 percent travel depending on their location. Preferred Qualifications: Advance degree Operational consulting experience. Hands-on experience in SAP as a user or in implementations. Experience implementing and/or using Blue Yonder or another advanced planning system. Experience working in a semiconductor foundry or OSAT, or in a contract manufacturing environment Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations:US, California, Folsom, US, California, Santa Clara, US, New Mexico, Albuquerque, US, Oregon, Hillsboro Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$99,487.00-$149,235.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In this role responsibilities include, although not limited to: Develops applications that work in and on industry or hybrid cloud environments using capabilities and frameworks from internal and external cloud providers. Develops and coordinates cloud architecture over various areas, including application development, identity and access management, network and data management, and security. Defines the initial DevSecOps solution and links it to the cloud platform. Utilizes DevOps processes, automation, culture, and target platforms. Leverages expertise in cloud platforms including Amazon Web Services, Google Cloud, Azure, building and designing web services in the cloud, orchestrating, and automating cloud-based platforms, as well as frontend development of the user interface that typically run over various form factors including mobile and PC. Utilizes HTML, JavaScript libraries, responsive, and/or AWS frameworks. In addition to the qualifications listed below, the ideal candidate will also have: Excellent verbal and written communication skills. A strong team player with initiative, self-motivation, and flexibility in dealing with ambiguous situations. Must be flexible to work with remote teams and handling multiple tasks in a dynamic IT environment. Proven ability to define complex business solutions and system architecture. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: The candidate must have a bachelor’s degree in electrical/computer engineering, computer science, or software development and 4+ years of experience -OR- a master’s degree in electrical/computer engineering, computer science, or software development and 3+ years of experience -OR- a PhD degree in electrical/computer engineering, computer science, or software development and 1+ years of experience in: 4+ years of experience years in data and analytics systems analysis and design. This position is not eligible for Intel immigration sponsorship. Preferred Qualifications: Experience with SQL, SSAS, SAP Hana, BOBJ, Azure, Databricks, Snowflake, and PowerBI. Experience with Financial information systems and business processes. Knowledge of Intel Finance information systems. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara Business group:Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$162,082.00-$243,222.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Do Something Wonderful! The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people’s digital lives. Come join us and do something wonderful! Who we Are: Intel Federal LLC is a wholly owned subsidiary of Intel Corporation responsible for managing Intel's business with the US Federal Government. We collaborate with Sales and Marketing, government affairs, and Intel business units (BUs) across Intel to develop and execute programs for US Government (USG) agencies. Intel Federal works with and across the defense industrial base (DIB) and systems integrator (SI) ecosystem to deliver mission solutions to USG customers. Intel Federal's Mission: Drive rapid, sustained, profitable growth of Intel's business in the Federal markets in partnership with product, research, and foundry teams while maintaining compliant execution of programs. Establish Intel as the national champion for semiconductors. Who you are: Come join the Extreme Scale Computing team as a Logic Design Engineer. We are developing the next generation prototype solutions across Supercomputing, Memory, and heterogenous computing systems. If you have a strong interest to influence next-generation development of High-Performance Computing Processor for Supercomputers, Graph Analytics/AI/Machine Learning SOCs or custom ASICs to partner with Xeon processor, this is the team to join. A day in the life of: We have a range of front-end design needs and your responsibilities might include: Working with architects to define, implement the handshake logic between IP and SOC and integrate them.Working with architects and design engineers to generate micro-architecture and/or verification plan.Define Microarchitecture Specification (MAS) and develop RTL for logical blocks.Collaborate with design verification team to develop a detailed verification test-plan and support simulation bring-up, debug and bug fixes.Debug, fix, and validate pre- and post-silicon sub-system logic issues and bugs.Opportunities to also contribute to architecture definition and performance modeling. The ideal candidate will have the following skills in addition to the qualifications listed below: Problem Solving: Identifies problems, root causes, and quickly develops solutions.Customer Focused: Uses strong and proven business partnership skills to listen, learn and anticipate our customers' needs.Communicative: Develops and deliver information clearly and concisely, in a well-organized manner.Action Oriented: Displays drive, energy, have proactiveness and anticipate customer needs, while staying focused and aligning priorities despite uncertainty.Innovation: Takes calculated risks in finding new ways and perspectives to do things.Partnership: We build professional relationships based on trust, respect, and delivery of results. Strong business partnership and influencing skills are essential across the Intel Federal team, including proactive liaison across IT, sales and marketing, and information security.Demonstrated willingness to work across a wide range of stakeholders in cross-functional projects.Strong problem-solving skills and the ability to think critically.Highly organized and able to manage multiple tasks and deadlines effectively.Eagerness to learn and adapt to new tools, techniques, and technologies in the field and government contracting. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly. For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information. Bachelor’s degree in electrical engineering or computer engineering and 1+ years of experience or Master's Degree in Electrical Engineering or Computer Engineering and 6+ months of experience or a PhD in Electrical Engineering or Computer Engineering and related experience. Must have the required degree or expect the required degree by July 2024. 1+ years of experience with Micro-architecture definition and RTL development1+ years of experience with processors, accelerators, networking or IO integration1+ years of experience with Computer Architecture, Microprocessor or Chip-set design methods Preferred Qualifications: Background in X86 or RISCV ISA and pipeline architecture/designSynopsys DC for synthesis and timing analysisExperience with SystemC and SystemVerilog Job Type:College Grad Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara Business group:Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$106,231.00-$159,109.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: AI and Edge computing is shifting how enterprises solve business challenges, drive improved processes, and delight their customers. At Intel, we are building and architecting solutions that will unlock Enterprise AI, unite hardware and software, and partner with a broad ecosystem to deliver solutions across vertical industries on open platforms. Within the Global Marketing Group, the Industry and Solutions Marketing team is chartered to accelerate Intel's transformation through an outcomes-based solutions marketing approach targeting key vertical segments with high opportunity use cases and workloads from edge to cloud. We are seeking a strong customer-obsessed individual to support the automotive industry vertical. This position is responsible for developing vertical marketing strategies to help drive revenue, grow share, and establish thought leadership for Intel's software-defined vehicle solutions. The individual will collaborate closely across the Intel Automotive business unit, the Automotive Sales COE, digital experiences, campaigns, and global comms on marketing strategies, including messaging, content, proof points, events, and other marketing activations. This role requires an understanding of marketing to the automotive industry and a blend of customer obsession, One Intel collaboration, and strong marketing acumen. Joining our team means joining a group of passionate, dedicated, and experienced marketers. Responsibilities Included but not limited to: Develop marketing and sales enablement strategies to support Intel's Automotive/software-defined vehicle business and sales objectives.Comprehend Automotive COE priorities and market competition into marketing insights and strategic recommendations.Develop key messages and proof points for integration into the automotive narrative and marketing activationsDevelop and orchestrate a strategy to deliver on opportunities in all available channels (PR, partners, events, demand generation, product launches, and scaling programs to Intel's ecosystem of partners.)Identify customer and partner integration points in direct marketing activations, events, and announcementsIdentify and oversee compelling and differentiated marketing content and sales enablement collateral that showcase Intel's unique differentiation and customer success stories A successful candidate will demonstrate: Understanding of the automotive industry, ecosystem, and competitionAwareness of Intel's compute platforms, customers and partners, portfolio of products and underlying technologiesWilling to comprehend GTM and sales priorities, define strategic direction and translate into actionable marketing initiativesExperience taking complex B2B topics and creating clear, concise narratives and proof point messagingStrong verbal and written communication skills, with experience creating marketing content and sales enablement materialsWilling to work independently, manage key stakeholder relationships and influence at all levels, in a complex, matrixed organizationManage cross-functional teams that deliver efficiently on objectives.Disciplined program management with ability to handle multiple complex tasks in parallel while maintaining high attention to detail and quality.Willing to translate business objectives into marketing ROI across multichannel campaigns and activities. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This Position is not eligible for Intel immigration sponsorship. Minimum Qualifications: 6+ years of product/solutions/industry marketing experience.Bachelors degree in any field. Preferred Qualifications: Experience with Intel or technology marketing is a plus.3+ years of experience marketing to automotive industry companies.MBA preferred. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, Austin Business group:Intel's Sales and Marketing (SMG) organization works with global customers and partners to solve critical business problems with Intel based technology solutions. SMG works across business units to amplify the customer voice and deliver solutions that accelerate their business. We work across numerous industries, including retail, enterprise and government, cloud services and healthcare as examples. The operations team focuses on forecasting, driving alignment with factory production and delivering efficiency tools and our marketing capability drives demand and localized marketing in locations around the globe. Our sales force navigates a complex partner and customer ecosystem while shaping product roadmaps, driving value for our customers, and collaborating to harness emerging technology trends to deliver comprehensive solutions. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$123,139.00-$203,801.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Foundational IP Group under Design Enablement in Technology Development has primary focus of Standard Cell Library development to support both Intel Product Teams and External customers. Group is looking for a highly motivated and experienced individual to lead the library development, and optimization of standard cell libraries to enable best-in-class IP and product design on all generations of Intel technology. Responsibilities include but are not limited to the following: - Leads and manages the strong and vital organization of the Production Library team in Malaysia that spans across all functions of the Production Library organization - Collaborates and work closely with the PL Staff members who own various libraries and functions. - Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, driving team results, and applying differentiated performance management. - Works to continuously improve organization and development processes across all areas of design to improve efficiency and achieve quality standards. As a technical lead, you are responsible for leading the standard cell library development and optimization activities with active collaboration with process technologists, product design and IFS stakeholders, and EDA vendors to achieve best-in-class cell/block level PPA and competitive EoU (Ease of Use) through DTCO (Design-Technology Co-Optimization). Assume a leadership role managing a group of engineers, leaders, and managers in circuit design development, layout design development, extraction/characterization execution activities, FE/BE modeling, reliability/IR drop characterization, driving automation, and standardization of standard cell library development and validation flows. Supporting development and delivery of various process and PDK (Process Design Kits) production standard cell contents. Our goal is to define, design, develop, and deliver best-in-class production standard cell libraries. Work on designing and characterizing standard cell libraries in the latest technology node, while also advancing the concepts of circuit design at the transistor level, as well as modeling and analyzing performance. Work together with global teams from different functions and undergo enhanced quality checks for our library work. Engage with customers to understand new library requirements and identify PPA (Power, Performance, Area) knobs through DTCO solutions. Communicate effectively with customers to ensure that all project milestones are met on time. Track and prioritize tasks across multiple event releases and efforts simultaneously. #designenablement Qualifications:Required skills/experience: - A high performer with 15+ years of demonstrable experience in most of the standard cell library domains such as circuit design, std cell layouts, extraction, characterization, modeling, physical view abstraction, logic view modeling, reliability and IR drop characterization, validation, quality assurance, documentation and library releases including customer support. - Deep working knowledge of digital logic design and standard cell library development in advanced nodes. - Demonstrated ability to understand and interpret industry benchmarks, create and drive strategies, work independently, and simultaneously manage diverse and extensive assignments while remaining organized and productive in a complex environment. Strong self-initiative, persistence, and ability to deal with a high degree of ambiguity and task and deadline pressure. - Strong written and verbal communication skills. Ability to synthesize abstract complex information into clear messages to create impactful presentations. Preferred skills/experience: - In-depth knowledge in digital design including CMOS combinatorial logic and sequential circuit and layout, and familiarity with design tradeoffs as well as standard cell modeling, extraction, and characterization highly desired. - Familiar with foundry ecosystem and benchmarking practice. Technical, analytical, customer-oriented, and cross-functional collaboration skills. - Ability to work in a dynamic and matrix team-oriented environment. - Experience in designing flips flops, clock gating cells, level shifters, power gating cells and other complex circuits. - Clear understanding of CMOS device characteristics and design rules in submicron process nodes. Knowledge of submicron process issues, especially in FINFET technologies. Familiarity in high sigma variation analysis in smaller technology nodes. - Experience in standard cell circuits optimization to achieve better PPA. Familiarity with layout design and experience in working with layout designers to optimize layout parasitic to achieve target PPA. - Involvement in layout extraction and understanding of layout dependent parameters in the extracted netlist. - Understanding of timing/leakage characterization of Standard cells. - Scripting capability in TCL/PERL/Python. Strong Analytical and Logical skills. #DesignEnablement Job Type:Experienced Hire Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Job DescriptionStep into the future with Intel's Elite Internship Program in collaboration with the Ministry of Higher Education Malaysia. Be part of change, innovation, and the extraordinary. This provides the successful candidate with Specialized Synopsys training with viva (5 weeks) In-depth Intel training on pre & post Silicon Hands-on experience with cutting-edge technologies Collaboration with Intel's global teams Qualifications:Open to Year 3 students with Bachelor or Master Degree in Electrical Engineering, Electronic Engineering, Electrical and Electronic Engineering, Microelectronic Engineering, Mechatronic Engineering, Computer Engineering or Computer Science. Additional qualifications include Knowledge of Computer System Architecture Understanding of a subsystem HWSW stack including the silicon all onboard HW components and connectors external or plugin adapters and devices drivers and applications Experience with C and/or C programming Highly motivated curious and a team player with keen interest in finding and resolving silicon failures Job Type:Student / Intern Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Kulim Additional Locations: Business group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: You will be designing the layout of sensitive analog components, although not limited to, such as receivers, transmitters, clocking, ADC/DAC PLL and LDO circuitry for High Speed IO's, Ethernet and Foundational IP's in Intel's current and next-generation process nodes. Responsibilities of the role include, although not limited to: � Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts. � Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks. � Performs the floor-planning and detailed signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance. � Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality. � Collaborates with analog circuit design, SD, SIPD, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed. � Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design. � Excellent communication and expected to drive clarity across customers, stakeholders, partners, managers by clearly and concisely summarizing problems, status, data, and proposals both orally and in writing. � Excellent teamwork and being flexible in assignment as per project needs. Qualifications:Qualifications: M.Tech in Electronics/Electrical/VLSI Design Engineering with 1+ years or B.Tech Electronics/Electrical/VLSI Design Engineering with 2+ years of relevant experience in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc. Preferred Qualifications: Analog Device and Metal Layout Fundamentals Analog/Mixed Signal Fundamentals Reliability Verification. Cadence Virtuoso Layout Suite Full Chip Top Metal/Analog Routing Design IP Design Planning. Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.