Intel

Job Details: Job Description: A passionate engineer to design, develop and optimize low level software for Intel's AI based accelerators and GPUs. In this role the candidate will work on cutting edge technologies, with a cross-geo team to design and develop top class software for Intel's Training and Inference accelerators. Candidate will have a chance to work on: - Scaling of workloads for both AI and HPC - Work on next generation NIC hardware optimized for AI - Design, develop and maintain network stack for the NICs - Solve complex technical problems Qualifications:BTech/MTech with at least 5+ years of relevant experience in system software design and development RTOS. - Candidate must have expertise in computer architecture, external API interfaces, code review and maintenance (C). - Candidate must have experience in operating systems and hands-on system level debug. - Strong knowledge in low level programming, system architecture, operating systems, device architecture and design. - Solid programming skills in C. - Strong Software design, development, debug skills and possess the ability to multi-task in a fast-paced environment. - Good to have basic knowledge about RoCE, RDMA, IBVerbs, PCIe - Analytical and problem-solving skills, stakeholder management and cross-geo collaboration skills - Written and oral communication skills and be able to clearly communicate concepts to peers and stake holders Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: - Responsible for analyzing and optimizing deep learning (DL) and machine learning (ML) algorithms on current and next generation Intel hardware and instruction sets. - Design, develop and optimize math kernels and Algorithms for Deep Learning accelerators using various compiler infrastructure - Profile distributed algorithms to identify performance bottlenecks and propose solutions across individual component teams. - Interact with global implementation team and deep learning researchers in defining cutting edge solutions Qualifications:- Mtech/MS/Bachelor in CS, ECE or related fields with 4+ years of relevant experience - Experience in optimizing software systems for CPU's/GPUs. - Experience with Vector processing and graph based optimizations - Strong statistics, applied math skills for real world HPC and Deep learning problems - Experience in any Machine learning/ Deep Learning Benchmarking process/tools - Strong coding skills in C++,Python and low level intrinsics - Good communication skills - Ability to work in a dynamic, cross-geo, startup-like environment Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Intel Habana India is looking to hire an experienced Silicon Validation Engineer in IC role for Intel's flagship AI product. Selected candidate will join a high-performing team of experienced engineers who are entrusted to validate the most complex AI processors in silicon. Key responsibilities: ? Develop and execute Test plans for post-silicon validation of cutting-edge Habana Cores and SOCs ? Design and craft Silicon Validation test infrastructure, write test sequences and verify on emulation platform and silicon ? Responsible of module driver which includes developing, porting, testing and debugging ? Work with cross functional teams such as SW, Architecture, Design, Verification and ATE to support product development ? Work in close coordination with Habana Israel Qualifications:Qualification: ? 3+ years of Experience in silicon validation and test plan development ? 5+ years of experience in VLSI and/or silicon embedded SW development ? Strong C/C++ programming skills ? Good understanding of SOC architecture and HW-SW integration ? Good pre and post-silicon debug skills - a must ? Highly motivated candidate looking to solve challenging problems ? Excellent spoken and written communication skills ? A problem solver and a team player Preferred skills and experience that will make you stand out: ? Any knowledge/skill related to GPU Subsystems ? Any exposure to AI/ML domain ? PCIe/CXL/Ethernet/Cache/NOC/HBM exposure ? Exposure to full tape-out cycle Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts. Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks. Performs the microfloor planning and detail signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance. Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality. Collaborates with analog circuit design, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed. Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design. Qualifications:Minimum Qualification – Candidate should possess at least bachelor's degree in electrical engineering or equivalent.Should have 3-8 years of Analog and mixed signal layout Experience in deep submicron CMOS technologies. Preferred Qualification – At least 2 years of relevant experience of High speed SerDes building blocks layout design.Good understanding of complex designs mainly CTLE, ADC, DACs, Current Bias, RefGen, PLLs, high speed Clock distribution, High speed amplifiers, LDOs etc.Sound basics of CMOS transistor and layout effects impacting performance and yield.Should be able to handle critical Custom analog blocks from Receiver or Transmitter by accurately coming up with effort estimation, creating precise execution plan which may be independent work or lead small team.Works with leads on Top level layout, provides inputs for efficient floorplan.Very good understanding of LV, RV and ESD Tools and basic understanding of these domains.Good work experience in all flows and tools like Virtuoso/CustomCompiler, Hercules/ICV/Calibre for LV, Redhawk/Voltus/Totem for RV, Extraction tools like StarRC and PERC flow for ESD.Good knowledge of Design Rule DecksShows interest and implements automation ideas.Strong written and verbal communication relevant to the job requirement is expected. Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group:The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So join the Intel Automotive team and help us create the next generation of technologies that will shape the future of the automotive industry for decades to come. Come join a dynamic and ever challenging team focused on the development and delivery of automotive hardware products, reference platforms and end-to-end solutions for the next generation automotive software defined vehicle platforms Key Responsibilities: Evaluate early customer requirements (RFI, RFQ phase) as well as change requests (CR's) and derive architecture specificationsDrive end-to end development of automotive platform hardware and translate automotive industry level requirements to circuit and component-level specificationsDesign, develop, modify, and evaluate electronic parts, components, PCB, or integrated circuitry for hardware platforms, and equipmentConduct logical design of printed circuit boards through component definition and schematics captureDefine component placement and circuit trace routing rules, and oversee board layout from feasibility studies to board tape-out while meeting automotive DFX requirementsConsider BOM cost and availability data versus design tradeoffs at the board and system levelsApply design expertise to define processes for technical platforms, system specifications, input/output, and working parameters for hardware and software compatibilityIncorporate feedback from other functions (including verification, validation, manufacturing, and customer) to improve development methodsPerform design research and verification development, testing, and utilization of firmware, hardware, components, mechanisms, materials, thermal solutions, circuitry processes, packaging, and chassis for platform hardwareCollaborate with architects, other platform hardware design engineers, hardware verification engineers, technical project managers, and technicians, to plan and lead platform hardware power-on and debug activitiesResolve system development and bring-up issues to deliver high quality boards and platforms for customers Qualifications:Minimum Qualifications: Bachelor's or Master's Degree in Computer Science, Computer Engineering, Electrical Engineering or Mechatronics Engineering5+ years of experience in hardware development engineering (preferably the automotive sector)Experience in designing high speed boards, debugging them at the component and system level, running root cause analysis, and implementing corrective actionKnowledge of PCB circuit design, schematics (preferrable using Cadence toolchain), BOM, and board/system level debugExperience with power delivery solution designAnalog and high-speed digital design knowledge/experience, analytical and debugging skillsExperience using lab equipment including but not limited to DMM, logic analyzer, network analyzer, and oscilloscopesSelf-motivated, well organized, excellent communication and influencing skills (good communicator, motivator, listener)Ability to work independently and successfully under tight project deadlines within cross-functional internal, external and sub-con teams Preferred Qualifications: Familiar with (and preferred to have working knowledge of) power design and power integrity analysisFamiliar with (and preferred to have working knowledge of) signal integrity analysisFamiliar with common communication protocols such as I2C, I3C, LPDDR, DDR, PCIe, USB, Ethernet, USBFamiliar with (and preferred to have working knowledge of) Functional Safety and Security designExperience in understanding what is required to implement and achieve EMI/EMC compliance at a system level.Knowledge in automotive hardware development processes and documentation from concept phase to serial productionPost-Si Validation experience on debugging/troubleshooting complex problems, with hands-on ITP or LTB experienceSoldering skills with fine pitch componentsAutomotive system knowledge with a good understanding of OEM, TIER1 and end-user requirements Job Type:Experienced Hire Shift:Shift 1 (Germany) Primary Location: Germany, Karlsruhe Additional Locations:Germany, Munich Business group:Corporate Strategy Office is chartered to support the executive office in driving corporate initiatives, including near and long-term strategy, major cross-group decision making and ensuring cross-company alignment. To deliver to that mission, the team owns shaping, driving and synthesizing insights to directionally orient trends as well as long range strategic planning/visioning , cross company alignment and greenfield innovation. Communications are essential to drive alignment so there is a focus on communications, community and acumen development. The team is ccommitted to ensuring that Intel efforts are aligned to, and actively driving success toward the most impactful business strategies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In Q4 2023, Intel announced Altera will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future. The Quartus compiler placer team in Toronto is responsible for developing state of the art algorithms written in C++ that map digital circuits to our FPGA devices. We use various optimization algorithms and AI techniques to solve the placement problem. This includes analytical placement methods for global placement optimization, annealing algorithms for detailed placement refinement, and network flow solvers for hard placement constraints. The goal of the placer is to generate near-optimal results to find a physical location for every block in the user’s design with reasonable runtime, while optimizing the timing of the design to help the user achieve timing closure for their target design frequency. The role includes research, design, development, and optimization of software tools that enable the use of Field Programmable Gate Arrays (FPGA). You will be leveraging strong knowledge of FPGA hardware, logic design, board design, and semiconductor devices to accelerate designs with the FPGA for domains such as deep learning, DSP algorithms, or data analytics. Qualifications:Relevant experience can be obtained through schoolwork, classes and project work, internships, military training, and/or work experience. Minimum Education Requirements BS degree in 10+ years of experience Electrical Engineering, Computer Engineering, Computer Science or related field or MS 8+ years of industry experience, or PhD 6+ years of industry software experience Minimum Qualifications Minimum of 8 years of C++ programming in a Linux/Unix environment. Minimum of 6 years of experience with FPGA or ASIC development flows. Preferred Qualifications: Experience C++ coding and development of high-performance parallel software systems Experience working in a modern large scale modular code base Experience developing EDA/CAD placement optimization algorithms for FPGAs or ASICs Experience with FPGA placement optimization approaches for analytical placement, clustering or detailed placement 2+ years' experience with Altera Quartus, or Xilinx Vivado Experience with scripting languages preferable Python, Perl or TCL Job Type:Experienced Hire Shift:Shift 1 (Canada) Primary Location: Canada, Toronto Additional Locations: Business group:The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Annual Salary Range for jobs which could be performed in Canada CAD 150,740.00-226,140.00Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will require an on-site presence.Canada Accommodation:Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.

Job Details: Job Description: At Intel, we are innovating the future. We create world-changing technology that enriches the lives of every person on earth. As an employer, we enrich our own people to make a difference in the world.The Commercial Client Marketing Integrated Team is seeking a leader for an exciting opportunity as part of Intel's leadership driving the critical small business segment.In this exciting role, the candidate must be able to develop and lead a data-driven, audience-focused Integrated Marketing Plan.In this role you will partner closely with sales, field, and stakeholders across Intel to accelerate growth in the commercial business. The ideal candidate is a quick learner and a rapid adopter of leading marketing best practices while being a leader skilled in both managing v-teams and championing effective marketing strategies and operational process to drive positive business outcomes.Provide global integrated marketing guidance to align small business marketing activities across multiple markets and channels to ensure a consistent flow of information resources along the buyer's journey.Develop and maintain Integrated Marketing GTM/Playbook aligned to business and marketing goals/objectives.Drive promotion pillar of the 4P plan within the retail channel. Own retail use case and narrative.Manage omnichannel marketing activities, including translating overarching marketing communications strategy into appropriate into channel execution plans.Owns audience tentpoles into integration into global editorial calendar.Educate the organization on channel best practices, applicable usage of each channel, and how channels can be used to complement one another in holistic communication for this audience segment.Drive critical integration into retail for small business segmentHelps guide creative execution to ensure channel creative and digital landing experiences are developed in a customer-centric tone/voice, align to larger product or brand campaign goals and channel best practices, and are seamlessly connected.Formulates and executes test strategies focused on improving key metrics.Analyze past results and makes recommendations to maximize return on investment.Stay current with industry and marketing trends to ensure continuous improvement and ongoing skills development. Take an active role in finding process improvements to drive increased efficiency in the marketing team.Serve as SME for customer and partner meetings, blog/thought leadership creation.Successful candidate will have:Strong interpersonal skills, cross-team collaboration, open and honest feedback, and interaction Proactive forward thinking, bias for action and learning mindset approach.Able to spot new opportunities and drive results. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. This Position is not eligible for Intel immigration sponsorship. Minimum Qualifications: Bachelor's degree in business and/ or marketing, communication, any related field.2+ years of combined experience in the following:Marketing or product management experience in PC, consumer electronics, or other relevant technology marketing.Experience driving multi-stakeholder planning processes, working in cross-team programs.Experience driving lead gen/account-based marketing. Preferred Qualifications: Master's Degree a plus Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: Virtual US Additional Locations: Business group:Global Marketing & Communications is responsible for Intel's brand management, end-user product marketing and go-to-market activation strategy for direct and indirect marketing programs worldwide Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, Colorado, New York, Washington, California:$105,797.00-$175,105.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. The application window for this job posting is expected to end by 06/20/2024

Job Details: Job Description: In Q4 2023, Intel announced Altera® will be reported as a separate business unit beginning on January 1, 2024, with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future.” We are seeking a highly skilled and experienced Functional Safety Manager to join our dynamic engineering team. The ideal candidate will have extensive knowledge of ISO 26262 and IEC 61508 standards and a strong background in Hardware/Silicon and Software development. This role involves leading the functional safety activities, ensuring compliance with relevant safety standards, and contributing to the design and development of safe, reliable FPGA products. Responsibilities include but are not limited to: Functional Safety Management: Develop and implement functional safety processes and procedures in accordance with ISO 26262 and IEC 61508. Lead and coordinate safety assessments and audits with both internal and external auditors. Define safety goals, safety requirements, and safety concepts for FPGA designs. Ensuring all Safety requirements are met. Ensure traceability of safety requirements throughout the development lifecycle. Safety Analysis and Verification: Conduct safety analysis including FMEA, FTA, and HARA. Perform safety verification and validation activities. Develop and maintain safety plans, safety case reports, and other safety-related documentation. Collaboration and Communication: Work closely with cross-functional teams including design, verification, software, and systems engineering to integrate safety requirements. Provide guidance and training on functional safety standards and practices to the engineering team. Act as the main point of contact for functional safety-related matters with customers, suppliers, and certification bodies. The ideal candidate should exhibit the following Behavioral Traits: Excellent project management and organizational skills. Strong communication and interpersonal skills. Willing to work effectively in a team-oriented, collaborative environment. Qualifications:This position is not eligible for Intel immigration sponsorship. Relevant experience can be obtained through schoolwork, classes and project work, internships, military training, and/or work experience. Minimum Qualifications Bachelor's or master's degree in electrical engineering, computer engineering, or a related field. Minimum of 7 years in the following: Functional safety management in concepts and methodologies in the semiconductor industry. Safety analysis techniques (FMEA, FTA, HARA). Preferred Qualifications Functional Safety Certification (e.g., TÜV Functional Safety Engineer). Experience in FPGA and ASIC development. Experience with a structured requirements management system such as (i.e. Jama / Polarion / DOORS / Jira). Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: US, California, San Jose Additional Locations:US, Oregon, Hillsboro, US, Texas, Austin Business group:The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, California:$144,501.00-$217,311.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process and packaging technology, chiplets, software solutions, robust ecosystem and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel’s secure, resilient and sustainable source of supply. As product innovations continue to grow in power and intricacy, so does our need for people who can solve complex challenges at our fabs around the world. We are looking to hire in our Arizona, Oregon, and New Mexico locations. Career Opportunities Our current and future opportunities for recent graduates and experienced professionals are in the following roles: Process Integration EngineersYield Engineers including Yield Analysis and Yield ModelingDevice and Device Integration EngineersDefect Reduction, Defect Metrology and Defect Control EngineersProcess and Process Development EngineersProcess Technology Design EngineerEngineering Managers If you are interested in hiring opportunities, please complete our application and be among the first who will learn about the opportunities as they arise. Qualifications:High level requirements: Engineering roles: Bachelor’s or Master’s degree in relevant field (chemical, mechanical, electrical engineering, chemistry, physics, applied mechanics, nanotechnology, semiconductor or similar field) and relevant industry experienceManagerial roles: Engineering or management degree, 3+ years of managerial experience #foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. For more information about our Open Systems Foundry and our benefits package and our commitment to a Work/ life Balance visit our Intel Foundry page: Intel Foundry | Intel Careers Job Type: Shift:Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations:US, New Mexico, Albuquerque, US, Oregon, Hillsboro Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Job Details: Job Description: Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing (HVM) at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers. This job requisition is to seek Sr BEOL (Back-End-Of-Line) Process Integration Development engineers for our FSM HVM Global Yield organization, reporting to BEOL Process Integration manager. Selected candidates will work with other members in BEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers. BEOL (Back-End-Of-Line) Senior Process Integration Development engineers' responsibilities include (but not limited to): Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.Collaborate with Technology Development and Local Yield teams to import new technology to production fabs.Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.Perform feasibility studies, plan and conduct experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product.Own NPI (New Product Introduction) in production fabs and perform product-specific process optimizations to meet foundry customers specifications and requirements.Own engineering projects in partnership with Local Yield teams to improve product yield, quality, device performance and to reduce wafer cost/improve fab efficiency.Engineering support for technical interactions with internal and external customers. #foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Qualifications:Minimum Qualifications Engineering, Physics, Chemistry or Materials Science or any STEM related field.Electrical/ElectronicBS degree in one of the following disciplines; 6-8 years of experience in advanced node semiconductor industry in BEOL Process Integration (preferably with experience in SADP/SAQP, advanced metallization, immersion lithography/EUV).Working level understanding of Device Physics and backend critical parameter control.Basic understanding and collaboration experience with processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology. Preferred Qualifications: Advanced (Masters/PhD) degree in one of the following disciplines with at least; Electrical/Electronic Engineering, Physics, Chemistry or Materials Science or any STEM related field.4 years of experience in Statistics and machine learning preferred Experience in project/program management and/or Task Force Team lead.Ability to extract and analyse key parametric data related to BEOL semi-conductor processing. Capable of basic automation of routine data extracts.Experience in Statistics and machine learning preferred Job Type: Shift:Shift 1 (Taiwan) Primary Location: Taiwan, Hsinchu Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's Integrated Device Manufacturer 2.0 (IDM2.0) strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in High-Volume Manufacturing (HVM) at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers. This job requisition is to seek Sr. FEOL (Front-End-Of-Line) Process Integration Development Engineers for our FSM HVM Global Yield organization, reporting to FEOL Process Integration Engineering Development Manager. Selected candidates will work with other members in FEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers. Sr. FEOL Integration Development Engineer's responsibilities include (but not limited to): Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.Collaborate with Technology Development and Local Yield teams to import new technology to production fabs.Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.Perform feasibility studies, plan and conduct experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product.Own NPI (New Product Introduction) in production fabs and perform product-specific process optimizations to meet foundry customers specifications and requirements.Own engineering projects in partnership with Local Yield teams to improve product yield, quality, device performance and to reduce wafer cost.Engineering support for technical interactions with internal and external customers. #foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Qualifications:Minimum Qualifications: Bachelor's Degree in Electrical Engineering, Physics, Chemistry, Materials Science or in a STEM related Field9+ years of experience in advanced node semiconductor industry in FEOL Process Integration in one (or more) of the following segments: Fin, Gate or PC, Spacer/Source-Drain or Junctions, RMG (Replacement Metal Gate), or Contact / MOL (Middle of the Line).Experience on Device Physics and in advanced nodes FinFET technology, GAA (Gate-All-Around) in development or high-volume manufacturing.Experience with processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology. Preferred Qualifications: Advanced degree (Master's or Ph.D.) in Electrical Engineering, Physics, Chemistry, Materials Science or in a STEM related Field.Experience in project/program management and/or Task Force Team lead.Experience at leveraging big data analysis to identify process design weaknesses and/or manufacturing weaknesses in order to propose corrective, data-based solutions.Experience in extracting insights from structured and unstructured data by quickly synthesizing large volumes of data and applying statistics and machine learning.Experience in new semiconductor technology development.Experience in Statistics and Machine Learning. Job Type: Shift:Shift 1 (Taiwan) Primary Location: Taiwan, Hsinchu Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in High-Volume Manufacturing (HVM) at a 2-year cadence going forward. Intel recently created the HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers. This position is for a Senior Engineer in the Device Integration team in the FSM HVM Global Yield organization, reporting to the Manager/Director of Device Integration Engineering. The selected candidate will work with other members in Global Yield org including Process Integration, Yield Analysis and Defect engineering teams, fab module/yield teams and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers. The Device Integration engineer's responsibilities include (but are not limited to): Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.Collaborate with Technology Development team to develop new device technology, customize device architecture per customer request and import to production fabs.Participate or lead cross-organizational team of engineers to identify root cause of device-related yield/performance issues and define mitigation plan to meet committed production yield/performance targets.Own NPI (New Product Introduction) in production fabs and perform device-related process optimization to meet foundry customers product specifications and requirements.Develop a model to predict device performance accurately in early-to-mid stage of Si progression and drive systematic solution to maintain baseline device performance.Work with Process Integration engineers to drive process simplification and implement cost reduction engineering opportunities in line. #foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Qualifications:Minimum Qualifications: Bachelor's degree in Electrical Engineering, Physics or Materials Science major. Other related science and engineering degrees can be considered based on industry experience.6+ years' experience in advanced node semiconductor industry in Device Integration.Experience in FinFET technology development or high-volume manufacturing.Experience with Device Physics and hands-on application in real-world fab environment.Experience with FEOL (Front-End-Of-Line) Integration teams including Fin, Poly, Source-Drain and Gate segments on Device performance improvement and targeting with technical understanding on how FEOL process changes impact Device parameters. Preferred Qualifications: Advanced degree (Master's or Ph.D.) in Electrical Engineering, Physics or Materials Science major.Experience in project/program management and/or Task Force Team lead.Demonstrated interpersonal skills including influencing, engaging, and motivating.Experience in serving external Foundry customers through technical interactions.Experience in GAA (Gate-All-Around) technology architecture.Experience in new semiconductor technology development.Basic understanding and collaboration experience with module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology. Job Type: Shift:Shift 1 (Taiwan) Primary Location: Taiwan, Hsinchu Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in High-Volume Manufacturing (HVM) at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers. This job requisition is to seek a Principal Engineer in the Device Integration team in the FSM HVM Global Yield organization, reporting to the Director of Device Integration Engineering. The selected candidate will own multiple projects in Device Engineering and will lead cross-organizational Task Force Teams, including but not limited to new device characterization, customization and productization, supporting internal and external customers. The Principal Device Integration Engineer’s responsibilities include (but are not limited to): Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.Collaborate with Technology Development team to develop new device technology, customize device architecture per customer request and import to production fabs.Lead a cross-organizational team of engineers to identify root cause of device-related yield/performance issues and define mitigation plan to meet committed production yield/performance targets.Lead a group of device engineers to improve and maintain device performance in a high volume manufacturing environment.Own NPI (New Product Introduction) in production fabs and perform device-related process optimization to meet foundry customers product specifications and requirements.Develop a model to predict device performance accurately in early-to-mid stage of Si progression and drive systematic solution to maintain baseline device performance.Work with Process Integration engineers to drive process simplification and implement cost reduction engineering opportunities in line. Candidate should possess the following behavioral skills: Problem-solving technique with strong self-initiative and self-learning capabilities.Ability to work with multi-functional, multi-cultural teams.Must demonstrate solid communication skills. QualificationsMinimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications: Master's or Ph.D. in Electrical Engineering, Physics or Materials Science major. Ph.D. degree is preferred. Other related science and engineering degrees can be considered based on industry experience.10+ years of engineering experience in advanced node semiconductor industry in Device Integration engineering.5+ years of engineering experience in FinFET technology development or high-volume manufacturing. Experience in GAA (Gate-All-Around) technology architecture is preferred.Working knowledge in module processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.Hands-on experience in serving external Foundry customers through technical interactions.Problem-solving and project/program management experience with strong self-initiative and self-learning capabilities.Proven track record of working across organizations through matrix structures to accomplish strategic objectives with conflicting priorities.Must demonstrate strong communication skills.Hands-on experience in new semiconductor technology development is strongly preferred. #Foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Job Type: Shift:Shift 1 (Taiwan) Primary Location: Taiwan, Hsinchu Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Job Details: Job Description: Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in High-Volume Manufacturing (HVM) at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers. This job requisition is to seek FEOL (Front-End-Of-Line) Process Integration Development engineering roles in FSM HVM Global Yield organization, reporting to FEOL Process Integration Engineering Development manager. Selected candidates will work with other members in FEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.FEOL (Front-End-Of-Line) Integration Development engineers’ responsibilities include (but not limited to): • Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets. • Collaborate with Technology Development and Local Yield teams to import new technology to production fabs. • Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases. • Perform feasibility studies, plan and conduct experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product. • Own NPI (New Product Introduction) in production fabs and perform product-specific process optimizations to meet foundry customers specifications and requirements. • Own engineering projects in partnership with Local Yield teams to improve product yield, quality, device performance and to reduce wafer cost. • Engineering support for technical interactions with internal and external customers. Qualifications:Bachelor’s degree in science and engineering major, with at least 15-18 years of experience.Experience in advanced node semiconductor industry in FEOL Process Integration (preferably in one (or more) of the following segments: Fin, Gate or PC, Spacer/Source-Drain or Junctions, RMG (Replacement Metal Gate), Contact / MOL (Middle of the Line)). Level of experience will be considered in determining applicants job grade.Working level understanding on Device Physics and experience in advanced nodes (FinFET technology, GAA (Gate-All-Around)) in development or high-volume manufacturing.Basic understanding and collaboration experience with processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films and metrology.Experience in Statistics and Machine Learning preferred. Preferred Qualifications: Advanced degree (Master’s or Ph.D.) in Electrical Engineering, Physics, Chemistry or Materials Science major is preferred, with at least 12-15 years of experience.Experience in project/program management and/or Task Force Team lead.Must demonstrate solid communication skills.Ability to work with multi-functional, multi-cultural teams.Demonstrated interpersonal skills including influencing, engaging, and motivating.Problem-solving technique with strong self-initiative and self-learning capabilities.Ability to leverage big data analysis to identify process design weaknesses and/or manufacturing weaknesses in order to propose corrective, data-based solutions.Ability to extracts insights from structured and unstructured data by quickly synthesizing large volumes of data, and applying statistics and machine learning.Experience in new semiconductor technology development.Experience in serving external Foundry customers through technical interactions.Experience in GAA (Gate-All-Around) technology architecture. #Foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Job Type: Shift:Shift 1 (Taiwan) Primary Location: Taiwan, Hsinchu Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Job Details: Job Description: Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers. This job requisition is to seek BEOL (Back-End-Of-Line) Process Integration Principal / Sr. Principal engineering role in FSM HVM Global Yield organization, reporting to BEOL Process Integration manager. Selected candidate will own technical projects and lead other members in BEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers. BEOL (Back-End-Of-Line) Integration Principal engineer's responsibilities include (but not limited to): · Lead complex and cross-organizational engineering projects to execute HVM yield roadmap, device targeting and attain performance targets, focusing on Cu BEOL integration. · Partner with BEOL Technology Development team to lead new technology transfer projects to production fabs. · Lead a group of FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases. · Own NPI (New Product Introduction) in production fabs and lead engineering tasks for product-specific process optimizations to meet foundry customers specifications and requirements. · Lead engineering projects to improve product yield, quality, performance and to reduce wafer cost. · Coordinate Process Integration team engineering support for technical interactions with internal and external customers. Qualifications:Master's or Ph.D. in Electrical Engineering, Physics or Materials Science major.15+ years of engineering experience in advanced node semiconductor industry in Cu BEOL Process and Integration.10+ years of experience in technology development or high-volume manufacturing. Integration experience in EUV-enabled technology nodes is strongly preferred.10+ years of experience in interaction with MOL module (Middle-Of-Line, Contact module).10+ years of experience in collaborating with module processes including lithography, dry etch, wet etch, CMP, thin films and metrology.Hands-on experience in new semiconductor technology developmentProblem-solving and project/program/TFT leadership experience with strong self-initiative and self-learning capabilities.Proven track record of working across organizations through matrix structures in order to accomplish strategic objectives with conflicting priorities.Demonstrated interpersonal skills including influencing, engaging, and motivating.Must demonstrate strong communication skills.Ability to work with multi-functional, multi-cultural teams. #Foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel US. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Job Type: Shift:Shift 1 (Taiwan) Primary Location: Taiwan, Hsinchu Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Job Details: Job Description: Provides technical support by phone, chat, email, and web ticketing interfaces to internal and external customers on software, hardware, and business processes and services. Provides necessary support to integrate and test computer environment systems. Installs, configures, and supports hardware that requires any physical adjustments, diagnosis problems in wiring, cabling, and other hardware issues and helps with commission and decommission of hardware. Helps the team to drive operational improvements and publishes reports on Key Performance Indicators (Service targets, Customer satisfaction, etc.). Collaborates and interacts with end users, IT Business partners, System Architects and other members of the support teams to ensure best support practices are implemented. Supports investigations and resolves production issues, configures and codes simple data fixes, and performs other operational tasks. Qualifications:Diploma or above education background Strong ownership with good integrity Good logical thinking and fast learning capability Good communication skill High team work spirit Job Type:Experienced Hire Shift:Shift 1 (China) Primary Location: PRC, Dalian Additional Locations: Business group:Employees in Intel's NAND Product Group deliver solutions that are transforming computing across all segments from data centers to Ultrabooks. They invent, develop, bring to market and support customers with leading-edge NAND flash memory and system level solutions such as solid state drives (SSDs). SSDs are accelerating performance for gaming enthusiasts, reducing total cost of ownership for IT managers of data centers and improving security and reliability for businesses. This dynamic group is strategically positioned to become the leading Non-Volatile Memory solution supplier for the compute segment and is a key to expanding markets and continuing the growth for Intel. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Intel's recently announced IDM 2.0 strategy includes a plan to significantly expand the manufacturing network, establishing new capacity and capability to meet the accelerating global demand for semiconductors. The Disaggregated Manufacturing Organization (DMO) will play an important role in this strategy, leveraging Intel's Advanced Packaging technology portfolio to deliver leadership products. To enable this ramp, DMO is building an Advanced Packaging manufacturing facility in Malaysia, increasing its investment in this region which has been a critical part of Intel's supply chain for nearly five decades. Join the Intel Malaysia Advanced Packaging team where you will be instrumental in developing and ramping some of Intel's newest Advanced Packaging technologies and help us realize Intel's vision to create and extend computing technology to connect and enrich the lives of every person on Earth. In this position you will be supporting organization operations to establish effective maintenance program toward best in class in safety, cost effective, interrupt free and conformant to ISO standard. Responsibilities will be included but not limited to: � 2-3 month internship supporting multiple manufacturing organizations. � Data analysis and report generation; ensuring systems operate reliably to avoid manufacturing/facility (or operations) impacts by meeting uptime goals. � Identify and implement opportunities to achieve lowest cost of ownership to key stakeholders while maintaining reliability. The successful candidate should exhibit the following behavioral traits: � Customer Orientation. � Communication skills. � Develop creative approaches/solutions. � Self-starter and team player. � Organization and prioritization skills. Qualifications:� The candidate must be Malaysia Citizen and undergoing one of the following educational requirements: Degree in Chemical/Mechanical/Mechatronic/Materials/ Electrical Engineering, Computer Science, Data Science, IT or equivalent. � CGPA Min 3.0 � Experience in MS office (Word, Excel, Powerpoint) Preferred Qualifications: � Effective programing and data fluency skills with a high tolerance for ambiguous and dynamic situations. � Demonstrated learning mindset on new equipment and systems. � Ability to work fast and agile in a matrixed environment. � Experience in Programming like: Power BI, Excel macro or Visual Basic Job Type:Student / Intern Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Intel's recently announced IDM 2.0 strategy includes a plan to significantly expand the manufacturing network, establishing new capacity and capability to meet the accelerating global demand for semiconductors. The Disaggregated Manufacturing Organization (DMO) will play an important role in this strategy, leveraging Intel's Advanced Packaging technology portfolio to deliver leadership products. To enable this ramp, DMO is building an Advanced Packaging manufacturing facility in Malaysia, increasing its investment in this region which has been a critical part of Intel's supply chain for nearly five decades. Join the Intel Malaysia Advanced Packaging team where you will be instrumental in developing and ramping some of Intel's newest Advanced Packaging technologies and help us realize Intel's vision to create and extend computing technology to connect and enrich the lives of every person on Earth. In this position you will be supporting organization operations to establish effective maintenance program toward best in class in safety, cost effective, interrupt free and conformant to ISO standard. Responsibilities will be included but not limited to: 2 - 3 months internship supporting multiple manufacturing organizations. Data analysis and report generation; ensuring systems operate reliably to avoid manufacturing/facility (or operations) impacts by meeting uptime goals. Identify and implement opportunities to achieve lowest cost of ownership to key stakeholders while maintaining reliability. The successful candidate should exhibit the following behavioral traits: Customer orientation. Communication skills. Develop creative approaches/solutions. Self-starter and team player. Organization and prioritization skills. Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: The candidate must be Malaysia Citizen and undergoing one of the following educational requirements: Degree in Chemical/Mechanical/Mechatronic/Materials/ Electrical Engineering, Computer Science, Data Science, IT or equivalent. CGPA Min 3.0 Experience in MS office (Word, Excel, PowerPoint). Preferred Qualifications: Effective programming and data fluency skills with a high tolerance for ambiguous and dynamic situations. Demonstrated learning mindset on new equipment and systems. Ability to work fast and agile in a matrixed environment. Experience in Programming like: Power BI, Excel macro or Visual Basic. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Job Type:Student / Intern Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Job Description Intel's recently announced IDM 2.0 strategy includes a plan to significantly expand the manufacturing network, establishing new capacity and capability to meet the accelerating global demand for semiconductors. The Disaggregated Manufacturing Organization (DMO) will play an important role in this strategy, leveraging Intel's Advanced Packaging technology portfolio to deliver leadership products. To enable this ramp, DMO is building an Advanced Packaging manufacturing facility in Malaysia, increasing its investment in this region which has been a critical part of Intel's supply chain for nearly five decades. Join the Intel Malaysia Advanced Packaging team where you will be instrumental in developing and ramping some of Intel's newest Advanced Packaging technologies and help us realize Intel's vision to create and extend computing technology to connect and enrich the lives of every person on Earth. In this position you will be supporting organization operations to establish effective maintenance program toward best in class in safety, cost effective, interrupt free and conformant to ISO standard. Responsibilities will be included but not limited to: � 2-3 month internship supporting multiple manufacturing organizations. � Data analysis and report generation; ensuring systems operate reliably to avoid manufacturing/facility (or operations) impacts by meeting uptime goals. � Identify and implement opportunities to achieve lowest cost of ownership to key stakeholders while maintaining reliability. The successful candidate should exhibit the following behavioral traits: � Customer Orientation. � Communication skills. � Develop creative approaches/solutions. � Self-starter and team player. � Organization and prioritization skills. Qualifications:Job Qualifications � The candidate must be Malaysia Citizen and undergoing one of the following educational requirements: Degree in Chemical/Mechanical/Mechatronic/Materials/ Electrical Engineering, Computer Science, Data Science, IT or equivalent. � CGPA Min 3.0 � Experience in MS office (Word, Excel, Powerpoint) Preferred Qualifications: � Effective programming and data fluency skills with a high tolerance for ambiguous and dynamic situations. � Demonstrated learning mindset on new equipment and systems. � Ability to work fast and agile in a matrixed environment. � Experience in Programming like: Power BI, Excel macro or Visual Basic Job Type:Student / Intern Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Our internship programs cater best to students who have the ambition to make the world a better place through technology and constantly challenge the boundaries of what is possible.You will be involved in large-scale data mining, data visualization, and machine learning algorithms used to make a prediction or classification.You will work with a diverse team of engineers who are delivering technical solutions to manufacturing process challenges.Gather, assemble, and verify data that will be used for a variety of purposes.Support and implement initiatives for continual engineering improvements.Assist in the modification of existing analysis and creation of new analysis.Perform other duties and projects as assigned by the manager. Qualifications:Pursuing bachelor's degree in computer science, Artificial Intelligent - Machine Learning, or any related disciplinesProficient in programming or scripting language e.g. SQL, Phyton; data visualization tool e.g. Power BI.Exceptional communication and interpersonal skills are necessary regularly communicates with internal and external stakeholders.Analytical skills, resourcefulness, and the ability to work in a team are necessary.Proactive, dedicated, innovative, and quick problem-solving abilities. Job Type:Student / Intern Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Responsibilities may be quite diverse and are technical in nature. U. S. experience and education requirements will vary significantly depending on the unique needs of the job. Qualifications:Technical individuals who are passionate to try out the latest development methods, explore and bringing innovations to current applications. Candidates passionate in React, .NET, SQL, GitHub, SAFe/Agile Development and requirement gathering and analysis with end customers. Job Type:Intel Contract Employee Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group:Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Manufacturing internship to supports Manufacturing system, Manufacturing executions System and Factory systems or applications Qualifications:Bachelor of Electrical Engineering, Mechanical Engineering, Computer Science Job Type:Student / Intern Shift:Shift 1 (Malaysia) Primary Location: Malaysia, Kulim Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process and packaging technology, chiplets, software solutions, robust ecosystem and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel’s secure, resilient and sustainable source of supply. As product innovations continue to grow in power and intricacy, so does our need for people who can solve complex challenges at our fabs around the world. We are looking to hire in our Kiryat-Gat, Israel location. Career Opportunities Our current and future opportunities for recent graduates and experienced professionals are in the following roles: Process Integration EngineersYield Engineers including Yield Analysis and Yield ModelingDevice and Device Integration EngineersDefect Reduction, Defect Metrology and Defect Control EngineersProcess and Process Development EngineersEngineering Managers If you are interested in hiring opportunities, please complete our application and be among the first who will learn about the opportunities as they arise. Qualifications:Qualifications: High level requirements:Engineering roles: Bachelor’s or Master’s degree in relevant field (chemical, mechanical, electrical engineering, chemistry, physics, applied mechanics, nanotechnology, semiconductor or similar field) and relevant industry experienceManagerial roles: Engineering or management degree, 3+ years of managerial experience #foundry Important: Please be informed that Intel is proactively trying to find candidates for a foundry engineering position which is frequently available at Intel IS. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. For more information about our Open Systems Foundry and our benefits package and our commitment to a Work/ life Balance visit our Intel Foundry page: Intel Foundry | Intel Careers Job Type: Shift:Shift 1 (Israel) Primary Location: Israel, Kiryat-Gat Additional Locations: Business group: Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: As a part of Intel’s data center & AI business, you will collaborate with a team of engineers focused on signal integrity as it pertains to Intel’s platforms and board designs. As an intern, you will develop new/existing tools to increase automation and organization of measured data. This will involve developing indicators based on the processed data along with integrating and developing quality checkers within the existing tool’s framework. As you interact with the team, it is expected that you will learn and apply signal integrity fundamentals. Throughout the internship, you will continuously interact with other engineers and stakeholders across several groups to accomplish high quality results for our platforms and customers. The ideal candidate should exhibit the following behavioral traits: Provide leadership and results. Excellent written and verbal communication skills Collaborate with others constructively. Work independently and develop solutions. The intern duration will be 6 to 12 months based on business needs. Qualifications:Relevant experience can be obtained through schoolwork, classes and project work, internships, military training, and/or work experience. This is an entry level position and will be compensated accordingly. Minimum Qualification Actively pursuing a master’s degree in computer science, electrical engineering or computer engineering Experience or coursework in computer science fundamentals and application Matlab, Python, other applicable computer science languages (Java, C, C++, etc.) Hardware design / computer architecture basics Job Type:Student / Intern Shift:Shift 1 (United States of America) Primary Location: Virtual US Additional Locations: Business group:The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, Colorado, New York, Washington, California:$63,000.00-$166,000.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. The application window for this job posting is expected to end by 06/18/2024

Job Details: Job Description: Intel is on a multi-year supply chain transformational journey. The Integrated Device Manufacturing 2.0 (IDM 2.0) Acceleration Office (IAO) is responsible for creating the internal foundry model within Intel that will power the next phase of our IDM 2.0 strategy. Implementing an internal foundry model means significant transformation to Intel's Supply Chain. The Equipment Configuration Management Program team is chartered with delivering and maintaining capabilities around the creation and maintenance of a single source of record for equipment configurations of factory equipment and the respective bill of materials (BOM) in Windchill. We are looking for a seasoned Windchill developer with experience designing and developing complex data structures, enabling workflow capabilities for internal and supplier (external) users, and integrating with other planning, master data and enterprise systems. The Enterprise Factory Equipment & Procurement team in Supply Chain IT is seeking a Windchill PLM experienced developer to perform (but not limited) to the following activities: The Windchill PLM experienced developer will be responsible to perform the following activities: Design customizations and extensions through modifying existing Windchill PLM solutions to correct errors or to upgrade interfaces and improve performance. Troubleshoot, debug and upgrade existing software for Windchill PLM Solution. Analyze data models and configure accordingly. Develop scripts as needed for mass data updates and migrations. Develop integrations with other ERP and data systems. Manage builds with GIT repository practices and prepare deployments. Develop custom handlers, user extensions, custom scripts, client-side customization, and web services. Other soft skills include: To serve as a technical lead on a subsystem or small feature(s). Manage projects of small to medium size and complexity, performs tasks, and applies expertise in subject area to meet deadlines. Demonstrated ability to effectively communicate in technical and non-technical terms, at all levels, within and outside the organization, with strong written and verbal communication skills. Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications The candidate must have a Bachelor’s Degree in Engineering, Computer Science or other STEM related degree and 4+ years of experience in: Windchill PLM 12, PDMLink, ProjectLink, and PTC's product suite. Agile/SAFe methodologies, and skilled in using JIRA Align. Experience managing system config changes over time, across multiple environments. Windchill 12, ACLs, OIR’s, Lifecycles, Workflows, InfoTasks, Webjects, actions/action-models. Java, JSP, JavaScript, J2EE, XML for modification of Windchill. Windchill Platform Structures Management, Part Classification, and Supplier Management. Windchill integration to SAP ERP 6.0 or SAP S/4. Experience with custom UI. Experience with data and system management such as data imports/exports, in-app business support via validations and problem analysis of data and configurations. Excellent customer interfacing to coordinate requirements, status updates. Agile/Scrum and ITIL methodologies, and tools such as Jira and ServiceNow. Experience developing and delivering end user training. SIT & UAT Testing experience enhancements, deployment, and go-live support. Preferred Qualifications Thingworx Connected PLM and Thingworx Navigate. Recommended Certifications PTC Windchill Business Administration. PTC Windchill System Administration. Job Type:Experienced Hire Shift:Shift 1 (United States of America) Primary Location: Virtual US Additional Locations: Business group:Intel's Information Technology Group (IT) designs, deploys and supports the information technology architecture and hardware/software applications for Intel. This includes the LAN, WAN, telephony, data centers, client PCs, backup and restore, and enterprise applications. IT is also responsible for e-Commerce development, data hosting and delivery of Web content and services. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Benefits: We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html Annual Salary Range for jobs which could be performed in US, Colorado, New York, Washington, California:$123,419.00-$185,123.00 Salary range dependent on a number of factors including location and experience. Work Model for this Role This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. The application window for this job posting is expected to end by 09/06/2024