Intel

Job Details: Job Description: About Us: Our goal is to ensure that Intel CPU Cores are of highest quality and performance, allowing our customers to build the best platforms in the market. We are seeking a highly skilled and experienced Senior CPU Debug Engineer to join our dynamic team. As a Senior CPU Debug Engineer, you will play a critical role in the development of our Core CPU, collaborating closely with our Architecture and Design teams, and providing top-notch customer debug support. Key Responsibilities: Logic Debug: Lead and actively participate in the logical debugging of our Core CPU designs. Analyze and resolve complex logic issues that may arise during the validation process as well in customer field. Collaboration: Work closely with the Architecture and Design teams to provide input on the architecture and design specifications, while also ensuring that the CPU implementation aligns with architectural intent. Customer Support: Act as a technical point of contact for customers, addressing their queries, issues, and debugging requests related to the Core CPU. Provide timely and effective solutions to customer problems, maintaining strong relationships. Debugging Tools: Develop and maintain debugging tools and methodologies to facilitate efficient CPU debugging. Stay up-to-date with the latest industry standards and tools to enhance debugging capabilities and innovate game changer DFD Continuous Improvement: Continuously identify opportunities for improvement in the CPU debug process, techniques, and tools. Implement process enhancements to increase efficiency and reduce debugging time. Cross-Functional Communication: Foster effective communication between different teams within the organization, including Hardware, Software, and Validation teams, to ensure seamless CPU integration and overall system functionality. Qualifications:Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of experience in CPU debugging, with a focus on Core CPU logic and design Proficiency in using industry-standard debugging tools and methodologies. Strong knowledge of CPU architecture and design principles. Excellent problem-solving skills and the ability to tackle complex issues efficiently. Exceptional teamwork and communication skills to collaborate with cross-functional teams. Prior experience in customer support and interaction. Knowledge of CPU verification techniques is a plus. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About the Team: We created the Intel High Performance Processor (P-Core), a disruptive technology that enables a broad range of devices from entry PCs to high end servers . You will be part of a team, participating in the design of a future generation of high performance Intel microprocessor. In this role you will: Perform implementation of High performance block level physical design from RTL to GDS to create a design database that is ready for manufacturing.Conduct all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Achieving final convergence.Analyse results and make recommendations for current and future product architecture.Possess expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools (Cadence/Synopsys/Mentor/Ansys).Optimize and converge design to meet and improve product-level parameters such as power, frequency, and area.Participate in the development and improvement of physical design methodologies and flow automation.Mentor and coach team members. Qualifications:Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering or equivalentAt least 7+ years of experience in Structural design using industry EDA tools. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations:Israel, Petah-Tikva Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About the Team: We created the Intel High Performance Processor (P-Core), a disruptive technology that enables a broad range of devices from entry PCs to high end servers. You will be part of a team, participating in the design of a future generation of high-performance Intel microprocessor. In this role you will: be performing static timing analysis of the Intel CPU and working on design methodology development and automation flows of the next Core products for PPA and efficiency. Mentor and coach team members. Qualifications:Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering or equivalent.At least 5+ years of experience in static timing analysis using industry EDA tools (PrimeTime, PTECO, Tempus) and understanding of latch based design, preference to additional experience in Full Chip design or block level structural or data path design. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: The NCCG group develops high-speed, cutting-edge Smart NICs (IPU) for Cloud customers with support for Crypto and Compression capabilities, advanced HW-based storage protocols, and compute capabilities. Our products are targeted for the comms and cloud data center industry and serve as a critical ingredient of Intel's Data-Centric strategy, shaping the Data Center and delivering an Intel end-to-end solution for this growing market. The IPU group is developing ASIC chips with and in-house SoC capabilities – from IP Design and verification through DFX and physical Design, to provide the full SoC capabilities for Smart NIC products. Position Overview: We are seeking a highly motivated and experienced Engineering Project Manager to lead our dynamic multi national team in the development and delivery of state-of-the-art System on Chip in our Cloud and AI Connectivity group. The ideal candidate will have a proven track record in managing complex VLSI SOC projects from conception to production, ensuring quality, timeliness, and budget adherence. The role requires good knowledge of SoC microarchitecture, IP reuse methodologies, integration processes, and excellent communication and management skills. Key Responsibilities: Project Planning and Execution:Develop and execute project plans, including defining scope, goals, deliverables, timelines, and resource allocation.Coordinate cross-functional teams including design, verification, physical implementation, and validation to ensure project milestones are met.Risk Management:Identify and mitigate project risks, proactively addressing potential roadblocks to ensure successful project delivery.Resource Management:Allocate and manage project resources effectively, ensuring team members have the necessary tools and support to meet project goals.Stakeholder Communication:Facilitate clear and effective communication with internal stakeholders, external partners, and customers, providing regular updates on project status, risks, and deliverables.Quality Assurance:Implement and oversee quality assurance processes to ensure designs meet industry standards and customer requirements.Budget Management:Monitor project expenses and manage the budget, ensuring efficient resource utilization and cost control.Technical Expertise:Stay up-to-date with the latest trends and technologies in VLSI SOC design and provide technical guidance and mentorship to the project team. Qualifications:Bachelor's or higher degree in Electrical Engineering or related field. Minimum of 10 years of experience in managing Silicon design teams Minimum of 5 years of experience in VLSI SOC project management of high scale projects Proven track record of successfully managing complex SOC projects from concept to production. Deep understanding of Chip Design life cycleStrong understanding of VLSI design methodologies, tools, and flowsExcellent leadership, communication, and interpersonal skills.Ability to work effectively in a fast-paced, dynamic environment. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations:Israel, Petah-Tikva Business group:The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: The NCCG group develops high-speed, cutting-edge Smart NICs (IPU) for Cloud customers with support for Crypto and Compression capabilities, advanced HW-based storage protocols, and compute capabilities.Our products are targeted for the comms and cloud data center industry and serve as a critical ingredient of Intel's Data-Centric strategy, shaping the Data Center and delivering an Intel end-to-end solution for this growing market. The IPU group is developing ASIC chips with and in-house SoC capabilities – from IP Design and verification through DFX and physical Design, to provide the full SoC capabilities for Smart NIC products. Job Summary: We are seeking a highly motivated and experienced chip design TFM and Design Automation Team Manager to lead our TFM team in our cloud networking group, in the development and optimization of electronic design automation tools, flows and methodologies. The ideal candidate will have a strong background in VLSI front end design (Design Validation and Design Engineering), EDA tools, and project management, with a proven track record of leading successful teams. Key Responsibilities: Team Leadership: Provide mentorship, guidance, and technical expertise to a global team (Israel, India, Europe and USA) of 15-20 TFM engineers.Foster a collaborative and innovative work environment to drive productivity and creativity.Project Management: Oversee the planning, execution, and delivery of the TFM, ensuring they are completed on time and within budget.Define project goals, scope, and objectives in alignment with company strategy.Tool Development and Optimization: Lead efforts to develop and enhance custom EDA tools to improve design efficiency and quality.Evaluate and integrate third-party EDA tools to enhance the design flow.Methodology Development: Drive the development and adoption of best practices, methodologies, and design flows in VLSI design.Stay updated with industry trends and emerging technologies to continuously improve methodologies.Collaboration and Communication: Collaborate with cross-functional teams including design, verification, and physical implementation teams to ensure seamless integration of EDA tools and methodologies.Communicate project status, risks, and opportunities to senior management.Resource Allocation and Planning: Allocate resources effectively to meet project deadlines and priorities.Work with HR to recruit, onboard, and retain top talent for the EDA team. Qualifications: Bachelor's/Master's/PhD degree in Electrical Engineering or related field.years of experience in VLSI design and EDA tool development.Strong proficiency in programming languages like Verilog, VHDL, and scripting languages (e.g., Python, TCL).Proven experience in project management, including planning, scheduling, and resource allocation.Excellent leadership and team-building skills. Preferred Qualifications: Experience with industry front end develoment tools and flows (Synopsis, Cadnece..)Publications or patents in the field of VLSI design or EDA.Strong communication and interpersonal skills. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations:Israel, Petah-Tikva Business group:The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Join our Wireless Connectivity Solutions team and drive innovation that connects the world Now more than ever before, more people are assisted with technology to connect. Intel’s world leading connectivity is in the heart of its PC and IOT platforms. If you have a strong software background and are passionate about building thrilling Bluetooth features that will practically change the way people interact with devices, we may have the job for you. Bluetooth Core FW team is looking for an experienced firmware engineer to join our power management firmware team. You will be working on the latest Intel SoC systems designing and integrating our ultra-low-power solutions. IMPORTANT: Please be informed that Intel is proactively trying to find candidates for a Senior Power Management Firmware Engineer position which is frequently available at Intel Israel. Please note that the position may not be available at this time. If you would be interested in this position should it become available, we would encourage you to apply, and our hiring team will be glad to contact you when/if relevant . Qualifications:At least 10 years of experience in developing embedded software.Very strong C/C++ coding abilities with preference to embedded layers.Hands-on experience with external test equipment: oscilloscope, power meter, etc.Thriving in a multi-geo collaborative environment and can communicate and authoritatively drive multiple projects.Passionate, inquisitive, and innovative!Major advantage for experience in low power domain, low level software development with close coupling to custom HW abilities.Bluetooth or other wireless experience preferred - not mandatory.Self-motivated, dedicated, self-reliant, critical thinking abilities.BA/BSc or equivalent in Computer Science or Computer Engineering. Job Type: Shift:Shift 1 (Israel) Primary Location: Israel, Petah-Tikva Additional Locations:Israel, Haifa Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Ready to join Intel CPU CORE Validation team? Our goal is to ensure that Intel CPU Cores are of highest quality and performance, allowing our customers to build the best platforms in the market. You will have a unique chance to lead major validation processes and to take on challenges and responsibilities right from the start, with organized and professional mentoring and Training programs. We offer a Hybrid mode of work allowing to combine work from home with 2 days of work from IDC Campus. In this challenging role, your job responsibility includes but is not limited to: Be an expert in CPU architecture and Microarchitecture and Si debug.Powering on the very first system built with Intel's latest and greatest CPU.Validating product features and identifying and debugging all functional bugs.Working shoulder to shoulder with Intel CPU Core Architecture and Design.Innovation of new solutions and demonstration of uncompromised quality during your workBe involved in validation plans development and reviews. Qualifications:BSC or MSC degree in Electrical Engineering, Computer Engineering, Software Engineering or Computer Science.2-7 years of expertise in Post Silicon chip functional validation.Strong analytical and problem-solving skills.Pre Si verification - Advantage.Ability to program in PYTHON and Assembly - Advantage. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Looking for CPU firmware architect candidate who is interested to define the next Intel Architecture and Technologies. In this position you will join the Intel CPU architecture team and be responsible on defining the next technologies that is implemented by CPU Core firmware, impacting Intel's next client and server generations. Job Description: Intel CPU Core microcode architecture team is looking for an engineer to drive innovative technologies for Core, new Microcode features, increase its robustness and improve its performance. As a Microcode architect, you will be part of the CPU Core architecture team who is defining the Microcode of all Intel's CPUs based on performance Cores. You will be in close partnership with the Microcode design and verification teams, as well as with CPU architecture department, Client and Server BUs, SoC design teams, CPU post-silicon team and more. This role is bringing the best of SW, HW and FW worlds. It will rely on deep interaction and communication with CPU engineers as well as with many other stakeholders. The work incorporates: 1. Innovating, defining and developing new Microcode enhancements, new technologies and other types of improvements. 2. Leading technical workgroups and Intel wide forums dealing with future technologies. 3. Extensive knowledge in IA and in P-Core micro-architecture. Qualifications:You must possess a Bachelor's, or Master's in Computer Engineering, Computer Science or Electrical/Electronic Engineering and preferably with experience in CPU architecture and IA. Knowledge/experience in x86 CPU architecture, computer system or CPU features, C/C++/assembly/Perl/Python programming or RTL simulation debug is an added advantage. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In this job, you will be joining Intel's development center in Haifa, which is part of Intel's worldwide development group, in charge of planning and designing a wide range of VLSI products. The team you will be joining is responsible for developing the CORE of Intel's next generation of CPUs with most advanced process technologies. In this role you will model and predict core power and performance (PnP) commitments that includes both dynamic and leakage power, frequency and performance. The position also holds responsibility for pre to post silicon correlation of PnP models as well as the responsibility for enhancement to pre silicon modelling based on silicon learning. In addition, the position requires interaction and communication with multiple SoC (System on a Chip) teams, business units and technical marketing teams. Qualifications:B.Sc. in Electrical or Computer Engineering - must.At least 3 years of experience in power or performance modelling in IP or SoC level.Power management basic knowledge.Understanding of transistors power performance basics.BE/FE design knowledge / experience - advantage.Post silicon power/ performance measurements - advantage.Experience in power data analysis - advantage. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: The Circuit Edit (CE) engineers are responsible for physical debugging Intel's advanced products (Core processors, controllers, and communication chips). The CE team is part of the Physical Debug group in the Manufacturing Product Engineering (MPE) department responsible for Intel products post-Si debug. You will work with Intel's state-of-the-art advanced analytical tools as part of the team. In your work, you will be responsible for operating the most advanced CE edit tool, such as FIB (Focus Ion Beam), and supporting the physical circuit edit process development. Qualifications:BSC or Practical Engineer (Handasai) in electronics or Mechatronics. Good technical understanding and skills. Ability to work in a group and independently. Good communication skills. Good knowledge of English, verbal and written Work in shift (morning/ evening)- must Knowledge in one of the following fields is an advantage: semiconductor, FIB, or TEM. Experience with advanced analytic equipment is an advantage. Additional specific training would be given in the lab. Job Type:College Grad Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: Drives manufacturing readiness from fab, assembly, and test factory to support engineering sample and customer sample generation (ES/QS/PRQ milestones), wafer start planning, product qual execution strategy. Drives and develops testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable postsilicon HVM ramp. Collaborates with designers to drive design for test/debug/manufacturing (DFT/DFD/DFM) features enabling efficient production testing of new products. Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment. Creates and tests validation and production test hardware solutions. Tests, validates, modifies, and redesigns circuits to guarantee component margin to specification. Analysis and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. Drives test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations. Analysis early customer returns with emphasis on driving test hole closure activities. Creates and applies concepts for optimizing component production relative to both quality and cost constraints. Optimizes product supply through data analysis of postsilicon binsplit, die level cherry pick (DLCP), and optimize sort/test content and yield downstream through data analysis. Qualifications:Bachelor's degree in Electronics, Electrical or Computer Engineering.Strong analytical and problem-solving skills, Excellent interpersonal communication and teamwork.Hands-on lab/debug experience with measurement and debug tools such as high-end technology equipment.The following will be considered an advantage:Ability to program in any programming languages such as MATLAB, C++, and PYTHON.Knowledge of CPU electrical interconnects, and general knowledge of operating systems. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About the Group: We develop the leading edge of the high speed Ethernet SERDES. We are looking to expand our Architecture / u-Architecture team in order to maintain the position of the first in the industry in baud rate, performance and in features-set. About the Job: We are looking for someone who will lead the development of high-speed cutting-edge SerDes design. As the lead of the micro-architectural definition and design implementation, the selected candidate will drive logic chip design achieving data rates of 224Gbps and above. In addition, the candidate will lead the SerDes features-set definition; interfaces with SOC and communication with our potential customers. Qualifications:Qualifications: A minimum of 10 years of relevant industry experience delivering complex, high-performance integrated solutions and leading them through mass production is required. Prior expertise in SerDes and PHY design.Experience interfacing with communications standards and optimizing serial link chip implementations is highly valued. Post-silicon experience validating and refining design outputs through debugging is strongly preferred. Additional experience with system architecture design and knowledge in digital signal processing techniques is an advantage. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In this position, you will be a part of Intel's Security Department working on processes and control at Intel's command center. The position is located in Haifa, The position includes command center routine and emergency operations: Security systems operation - CCTVAccess controlLSSEvent responseInternal communication management Work is in shifts and includes a wide range of challenges and areas of responsibility. *Please be informed that Intel is proactively trying to find candidates for Haifa Command Center Officer position and that this position may not be available at this time. #HaifaSecurity Qualifications:Required availability: 3-4 shifts per week, one of those on Sunday-Thursday morning / 100-120 hours a month. We are looking for a student, with at least 2 years till graduation. Added values: Relevant security experienceTraining and command experienceComfortable in a computerized environmentGood English Fluency- Speaking/Writing.Leadership skills alongside good teamwork abilities Job Type: Shift:Shift 11 N3 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:Intel Product Assurance and Security (IPAS) is responsible for implementing and operationalizing proactive security and risk-prioritized measures for all of Intel's products. IPAS is also chartered with understanding the next generation of security threats and technologies, while guiding future research and architecture decisions to secure Intel's platforms while fostering a security first culture into Intel's product development and strategic practices. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Job Details: Job Description: Corporate Services (CS) touches the lives of every Intel employee every day. CS creates an environment where employees can prosper while creating the innovative technologies that make amazing possible. Our scope is vast and includes operating and maintaining all Intel sites, offices, labs and factories globally as well as onsite services and experiences that help employees stay safe and productive. CS also helps to make Intel and our community a greener place by supporting Intel's commitment to environmental sustainability, including investing in conservation projects, setting company-wide environmental targets, and driving reductions in greenhouse emissions, energy use, water use, and waste generation. Key Responsibilities: In this position, you will need to successfully partner with key stakeholders including Intel Business Units (BU's), Facility Operations owners, global supply management, Intel Finance, and suppliers to: - Lead and manage a wide spectrum of Construction projects to enable Intel businesses at Intel Israel RnD sites. - Lead the planning and co-ordination of relevant activities to deliver construction scope, schedule and budget to meet Intel's business needs. - Maintain construction projects in compliance with all local relevant laws related to construction activities, ensuring any necessary licenses and/or permits are in place. - Manage day-to-day construction operations to ensure a safe working environment for everyone, adhering to Intel Environmental, Health and Safety (EHS) requirements and participating in incident investigations, when needed. - Establishing key relationships with the Architectural / Engineering (AE), General Contractor (GC), Design/Builders (DB), 3rd party Quality Assurance Quality Control (QAQC) and Project Stakeholders in ensuring smooth project execution according to schedule, quality and change controls. - Translate business and technical requirements into high quality designs that enable biddable, affordable and constructible solutions. - Foster innovation and transform traditional construction practices by driving new methods and engineering solutions by leveraging industry insights to Intel's multidimensional challenges. - Ensure sustainability, SMART building, Energy Efficiency, - Engage in the transformation of Intel's culture and set the pace to be the best in the world in safety, operational excellence, innovation, partnership, customer service and making CS the best place to work in Intel. Qualifications:Qualifications: - A bachelor's degree with +4 years of experience or a masters' degree with +3 years of experience, in architecture, project engineering or construction management. - The qualified candidate will have a minimum of 3+ years of construction leadership experience in roles of construction project manager, design manager, engineering manager, site construction manager, or equivalent construction leadership expertise. - The candidate must have the ability to manage discussions with senior management, drilling down to details and managing an effort 'hands on' if the need arises. - Ability to manage across diverse groups and stakeholders while optimizing the solution for Intel. - Good communications skills in English and Hebrew, both written and spoken, as you will be communicating with various stakeholders on a regular basis as well as syncing with management on status and future plans. - Solid resume of Medium-scale projects and program management. - The person must have strong leadership and communication skills as well as demonstrated ability to drive decision making. - Knowledge of CMP, PMBOK or PMP certification is an advantage. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will require an on-site presence.

Job Details: Job Description: About the Organization: As part of the Core Engineering Group, we develop Intel's main and most valuable and complex IP - the CORE. The CORE is the central part of many of Intel's products, such as: Desktops, Notebooks, Servers, Cloud CPUs and more. Our CORE is in the heart of hundreds of millions of products being sold every year, and is driving the internet, networking industry, cloud compute, communications, and more. About the Job: In this role, you will be responsible for ensuring the logic correctness during the development of each new Intel CPU product before it is shipped to production. The role's responsibilities include developing dedicated verification environments and tools, while driving a complex process of exercising the design to verify its logical correctness. These environments are developed using unique, state-of-the-art languages, tools and advanced software engineering methodologies. Various validation techniques are used, such as simulation, formal verification, and digital/analog verification, while offering a unique Hardware-Software experience. You will be joining a winning team of engineering excellence and playing a central role in developing Intel’s future product lines. Qualifications:B.Sc or M.Sc in Electrical Engineering or Computer Engineering.At least 3 years of experience in Pre-Silicon Verification environments.Team player, passionate, energetic, motivated, and able to drive global activates.Familiarity with CPU architecture – advantage.Experience with RTL design, Verilog and simulation, and System Verilog based verification techniques – advantage.Experience in working with Specman language – advantage. Job Type:Experienced Hire Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: The Finance organization at Intel works closely with various business units and is deeply involved in providing business analysis, planning, and monitoring all aspects of the business. The team is looking to hire a student to join as an FP&A analyst. This Finance student position will be the Financial Planning and Analysis (FPnA) for Visual Computing Group (VTG). VTG is a group within the Incubation and Disruptive Innovation (IDI) group chartered with developing 2D camera IP, the hardware and software used across multiple segments, including Client, Internet of Things (IoT), Automotive, and Robotics. In this role, the Finance student will partner and interact with VTG management as well as Finance organization in Israel and abroad. The student will perform monthly and quarterly Close, annual and quarterly planning and forecast, monthly budget tracking and various ad-hoc analyses. Some of the work will be during the late afternoons/evenings to interact with US partners. Qualifications:Student of Economics and/or Finance and/or Business Administration studying towards a Bachelor or Master's degree, with at least 4 semesters till graduation.Availability for at least 25 hours a weekGood systems aptitude and ability to become a systems expert and lead.Attention to details and ability to work with large databasesGood business and financial understandingSolid partnership skillsCommunication skills (Hebrew and English), both verbally and in writing. Job Type:Student / Intern Shift:Shift 1 (Israel) Primary Location: Israel, Haifa Additional Locations: Business group:As members of the Finance team, employees act as full partners in making and supporting business decisions that are aimed at maximizing shareholder value. Intel Finance has a strong focus on facilitating change and improvement both within finance and in the operations supported. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About Us:The NEX Cloud Networking Group (NCNG) powers Intel's transformation from a PC-centric company to a global leader that powers the cloud and billions of smart, connected computing devices. We deliver world-class Ethernet products that drive the world's data and form the backbone of cloud services and telecommunications data centres. We're a cohesive team of problem solvers, experimenters, and innovators, designing the network technologies that currently lead and continue to shape the future of data centre ecosystems. As we push the boundaries of Ethernet networking marketing technology, we seek to bolster our team with skilled professionals committed to teamwork, clear communication, and innovation. Job Description:We are seeking an experienced Physical Design Engineer to join our team in the development of Intel IPU products. In this role, you will be responsible for synthesising RTL designs into technology-dependent netlists and bring them through the entire physical design flow. You will implement Automatic Place and Route (APR) processes, logically organizing components to ensure a design that can be manufactured into a working silicon chip. This involves executing critical stages such as Clock Tree Synthesis (CTS), routing, and Static Timing Analysis (STA) with the aid of industry standard Synopsys EDA tools. Additionally, your responsibilities will include conducting Design Rule Checking (DRC) and Layout Vs. Schematic (LVS) procedures to validate the physical design against foundry rules and guarantee the integrity of the circuit design. Completing formal verification and performing reliability (IR/EM) analyses are also part of your role, ensuring our designs meet the highest standards in terms of performance, power and area. Your role will demand not just technical prowess but also efficient communication, and a deep commitment to teamwork. We value professionals who can nurture learning, build trust within the team, articulate problems, seek out solutions, and share their insights for collective growth. Collaboration will be a key part of your role, working closely with the RTL design team to efficiently and effectively resolve issues. At Intel, we understand the importance of work-life balance. To that end, we offer a hybrid working model that blends on-site collaboration with remote work flexibility. Our employees have the freedom to work from home on certain days, while enjoying the benefits of face-to-face collaboration in the office as required. This approach allows us to meet business objectives without compromising on our team's well-being and personal productivity. We believe in empowering our employees with the flexibility they need to do their best work, wherever they are. Qualifications:Skills and Qualifications:A Bachelors/Masters degree with a minimum of 5 years of experience in the Physical Design domain. Strong understanding of the RTL2GDSII flow for leading or mainstream process technologies. Solid grasp of the concepts related to synthesis, P&R, CTS, timing convergence, IR/EM checks, and signoff DRC/LVS closure. Expertise in optimizing cost functions including performance, power and area. Excellent communication skills that foster team cohesion and efficient problem solving. Strong knowledge of EDA tools, including but not limited to Synopsys ICC2, Fusion Compiler, PrimeTime, Conformal, and Redhawk. Experience in the following areas would be an advantage: Full-chip experience (floorplan, layout, timing, DRC/LVS, RV) Proficiency in automation skills using PERL, TCL, and EDA tool specific scripting. Experience with leading Foundry Technology. Familiarity with Cadence APR tools in addition to Synopsys APR tools is an advantage. Job Type:Experienced Hire Shift:Shift 1 (Ireland) Primary Location: Ireland, Shannon Additional Locations: Business group:The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: About Us:The NEX Cloud Networking Group (NCNG) powers Intel's transformation from a PC-centric company to a global leader that powers the cloud and billions of smart, connected computing devices. We deliver world-class Ethernet products that drive the world's data and form the backbone of cloud services and telecommunications data centres. We're a cohesive team of problem solvers, experimenters, and innovators, designing the network technologies that currently lead and continue to shape the future of data centre ecosystems. As we push the boundaries of Ethernet networking marketing technology, we seek to bolster our team with skilled professionals committed to teamwork, clear communication, and innovation. Job Description:We are seeking an experienced Physical Design Engineer to join our team in the development of Intel IPU products. In this role, you will be responsible for synthesising RTL designs into technology-dependent netlists and bring them through the entire physical design flow. You will implement Automatic Place and Route (APR) processes, logically organizing components to ensure a design that can be manufactured into a working silicon chip. This involves executing critical stages such as Clock Tree Synthesis (CTS), routing, and Static Timing Analysis (STA) with the aid of industry standard Synopsys EDA tools. Additionally, your responsibilities will include conducting Design Rule Checking (DRC) and Layout Vs. Schematic (LVS) procedures to validate the physical design against foundry rules and guarantee the integrity of the circuit design. Completing formal verification and performing reliability (IR/EM) analyses are also part of your role, ensuring our designs meet the highest standards in terms of performance, power and area. Your role will demand not just technical prowess but also efficient communication, and a deep commitment to teamwork. We value professionals who can nurture learning, build trust within the team, articulate problems, seek out solutions, and share their insights for collective growth. Collaboration will be a key part of your role, working closely with the RTL design team to efficiently and effectively resolve issues. At Intel, we understand the importance of work-life balance. To that end, we offer a hybrid working model that blends on-site collaboration with remote work flexibility. Our employees have the freedom to work from home on certain days, while enjoying the benefits of face-to-face collaboration in the office as required. This approach allows us to meet business objectives without compromising on our team's well-being and personal productivity. We believe in empowering our employees with the flexibility they need to do their best work, wherever they are. Qualifications:Skills and Qualifications:A Bachelors/Masters degree with a minimum of 3 years of experience in the Physical Design domain. Strong understanding of the RTL2GDSII flow for leading or mainstream process technologies. Solid grasp of the concepts related to synthesis, P&R, CTS, timing convergence, IR/EM checks, and signoff DRC/LVS closure. Expertise in optimizing cost functions including performance, power and area. Excellent communication skills that foster team cohesion and efficient problem solving. Strong knowledge of EDA tools, including but not limited to Synopsys ICC2, Fusion Compiler, PrimeTime, Conformal, and Redhawk. Experience in the following areas would be an advantage: Full-chip experience (floorplan, layout, timing, DRC/LVS, RV) Proficiency in automation skills using PERL, TCL, and EDA tool specific scripting. Experience with leading Foundry Technology. Familiarity with Cadence APR tools in addition to Synopsys APR tools is an advantage. Job Type:Experienced Hire Shift:Shift 1 (Ireland) Primary Location: Ireland, Shannon Additional Locations: Business group:The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Work with the world's leading communications service providers and vendor ecosystem directly and indirectly to help drive infrastructure transformation. Understand the business use cases, technical merits and TCO value propositions identifying gaps and opportunities and putting in place strategies to address win and deploy solutions that drive alignment with the Communications Service Provider service offerings. Employ solution selling methodologies to influence within the customer organization and Intel to drive customer requirements and market needs into actionable goals. Develop the strategy and influence Intel's product and solution roadmap to meet comms service provider market requirements drive clear competitive differentiation and prove the value of these solutions in practice. Build, test and Position solutions value to customer influencers, software partners as well as train a worldwide sales force to scale business opportunities. Evangelize Intel technologies in public forums as conferences and various customer events to help drive software evolution infrastructure change and business scale. Qualifications:Bachelors Degree in Electrical Engineering Computer Engineering Computer Science or equivalent technical knowledge Masters preferred8 years of industry experienceCustomer facing experience is requiredStrong understanding and experience with with some of the following: Telecommunications networking, 5G wireless core, Cloud computing, containerization technologies, Kubernetes, virtualization and software defined networking. Job Type:Experienced Hire Shift:Shift 1 (Ireland) Primary Location: Ireland, Shannon Additional Locations: Business group:The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: When you join Developer Software Engineering, you'll be part of an Intel team that develops state-of-the-art tools such as compilers, libraries and performance analysis tools. Our products enable developers to unlock the performance of Intel's broad product line from laptops to supercomputers. We are currently expanding our Analyzers Engineering team with a focus on frontend tools development. We produce tools that analyze application software and hardware platform performance. These tools help Intel's customers use our world-changing technology more effectively, to improve the life of every person on the planet Qualifications:QualificationsMinimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in Computer Engineering, Computer Science or related technical discipline 6+ years of experience in C/C++, XML and Python on elementary to medium level Awareness of the frontend data feeding flow (aka backend), including SQL database queries, and asynchronous requests 3+ years of experience in Frontend development, including proficiency in JavaScript and deep knowledge of one (or all) frameworks such as React.js / Vue / Web Components; Be familiar with frontend build stack tools (Webpack and Gulp) Strong communication skills, including an ability to break down complex issues into concise and accurate summaries Understanding of web technologies and architectures Ability to create HTML markup from scratch as well as effectively modify existing one Fundamental knowledge of Operating Systems (OS) Preferred Qualifications: Experience with performance tools and methodologies Virtualization and Containers: Hyper-V, KVM, Linux, VMware, Docker or Kubernetes Familiarity with tools such as IDEs, Git, GitHub, Jira and/or Wikis Knowledge of web performance optimization techniques and tools Passion to responsive and adaptive design principles and UI/UX best practices Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Hyderabad Additional Locations:India, Bangalore Business group:Do you want to impact how thousands of software developers around the world use Intel platforms? Join the Developer Software Engineering (DSE) organization and work on the latest technology enabling compilers, debuggers, analyzers, libraries, and parallel runtimes. You will develop industry-leading software which abstracts and showcases Intel platforms, extracts peak performance, and amplifies Intel business through our Hardware and Software developer communities. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: Your job scope includes validation of microarchitecture, testbench design and implementation, logic verification (includes dynamic as well as formal verification), and post-Si validation debug support. You will be responsible for verification of complex RTL/logic clusters that go into the latest Intel graphics products.Your daily work will include one or more of the following responsibilities. The exact scope can be tailored based on applicant's skills and experience.� Develop detailed validation specs for testbench and validation collaterals design and/or comprehensive testplans for verification� Define verification strategy and develop execution plans� Ensure that validation sign off meets all the required matrices of coverage, pass rates, performance criterion as well as feature goals� Design verification involving TestBench development, architecture/functional modeling, functional coverage closure, test writing, and debug� Post-silicon debug and support� Execution and debug of hardware simulations; achievement of functional test coverage objectives. Identification and closure of design and environment defects, including bug fixes requiring manual ECOs (gate-level netlist edits).� Planning and organizing design/val projects or phases of design/val projects Qualifications:Bachelor of Engineering degree in Electronics or Computer Engineering with 8 year experience in silicon design development Additional qualifications include Experience with RTL verification and validation microarchitecture using VerilogSystemverilog Experience with coverage driven verification testbench development functional modeling and test writingdebug Experience with industry standard frontend design and verification flowstoolsmethodology Experience with scripting shellPERLDesirable Qualifications Strong analytical ability problem solving and communication skills Ability to work independently and at various levels of abstraction Experience with using Formal Verification tools for verifying designs Experience with OVMUVM based testbenches Design knowledge in synthesis and timing analysis Knowledge of graphics architecture and designs Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations:India, Hyderabad Business group:The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: In this position, the candidate would play a senior Technical Leadership role in the Architecture, Microarchitecture for SOC development within the Automotive Business unit. Candidate responsibilities include the following: Define SoC/SS architecture for Automotive SoCs and publish the specification for the various SS/IPs Drive the selection of various interface and functional IPs Work with Design and Verification leads on feature scoping, trade-off analysis and design implementation phasing plans, Verification recommendations, Design and Verification plan reviews. Interface with Physical Design during timing clocking reviews and convergence issues, Power-Performance, and post-Silicon Validation team during Power-ON and post-si val Performance modeling and analysis of the various SS and SoC Power/PnP analysis under various workloads Define Boot/Reset/Power management flows Understand product security objectives, threat models, define security architecture and access controls Drive and help build forward looking strategy for the team Qualifications:Candidate must possess a Master of Science degree in Electrical/Computer Engineering or associated discipline with 7+ years of relevant experience, OR Bachelor of Science degree in Electrical/Computer Engineering or associated discipline with 10+ years of relevant experience The candidate should exhibit: A strong background in computer architecture, memory, networks, systems architecture Proven ability to drive solutions to complex cross-functional technical problems working with senior technical peers/partner organizations Broad expertise covering all phases of the design cycle Excellent communication skills Flexibility to work in a dynamic environment and seamlessly multitask Acumen to identify and develop strategic opportunities Innovative thinker, able to propose/drive solutions to tough product definition challenges to meet power/performance and functional requirements Preferred Skills/Experience (one or more of the following): Experience with Graphics IP and Discrete Graphics SoC architecture Experience with High performance and/or low power SOCs Experience with LPDDR/GDDR/HBM memory interfaces Experience with Network-On-Chip, USB, Ethernet, Media, Video interfaces Deep knowledge of security attacks, mitigation strategies, security development life cycle System-C based performance modeling Prior PnP analysis experience at SoC level Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Hyderabad Additional Locations:India, Bangalore Business group:Corporate Strategy Office is chartered to support the executive office in driving corporate initiatives, including near and long-term strategy, major cross-group decision making and ensuring cross-company alignment. To deliver to that mission, the team owns shaping, driving and synthesizing insights to directionally orient trends as well as long range strategic planning/visioning , cross company alignment and greenfield innovation. Communications are essential to drive alignment so there is a focus on communications, community and acumen development. The team is ccommitted to ensuring that Intel efforts are aligned to, and actively driving success toward the most impactful business strategies. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: The Xe Silicon Engineering (XSE) Division, within the CCG (Client Compute Group), is responsible for design and development of Graphics, Media and Display IPs as well as discrete Graphics SoCs (GPUs), targeting both Client Device and Datacenter markets. The XSE organization is at the center of Intel's push into the discrete Graphics SoCs (ARC GPUs) market segment targeting next-generation applications such as High-performance Exascale computing, Deep learning / training, Cloud Graphics, Media analytics, High-end gaming, etc. In this position, the candidate would play a senior technical leadership role in the Logic Design for Discrete Graphics SOC development within AXG. The candidate is expected to lead the development of the design execution for a complex IP, Subsystem or SOC. All roles require close collaboration with planning teams, architects, verification, DFT, physical design and post-silicon teams. We are looking for multiple candidates to fill the following roles:o Lead a global team of design engineers (RTL and FW) to successfully deliver an SOC design from architecture definition to tape out. o Responsible as a lead for driving all design activities of an SOC starting with schedule creation, aligning deliverables and then during execution ensuring all RTL milestone deliverables are on-time with expected quality levels.o Lead design of a complex IP or Subsystem that will be used in a Discrete Graphics SOCo Expertise in Caches, memory controllers, DDR/HBM, PCIE, Power Management or high-speed IOs is preferredo Lead SOC level design function or teamo Expertise in Low Power UPF Implementation, Clocking, Integration, DFD, Synthesis or Quality checks (such as CDC, Lint, VCLP, Formal EQ) is preferred Qualifications:o Bachelors or Masters degree in Electrical, Electronics or Computer Engineering with min 12+ years of relevant industrial experience. The candidate should exhibit: o Excellent verbal and written communication skills o Strong understanding of SoC and IP architectures, design integration, low power design flow, constraints, RTL quality checkso Proactive drive to achieve high-quality results through strong team-worko Proven ability to drive solutions to complex cross-functional technical problems working with senior technical peers/partner organizationso Solid breadth of design expertise spanning all phases of the design cycle Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations:India, Hyderabad Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: PCIe domain expertise is must, CXL domain knowledge will be added plus. SV, UVM, Test Planning, TB Development, Functional Coverage, Verification Closure.Work Closely with Architect, Designer and develop efficient Testplan and come up with TB requirements.Leading major cluster/top level verification, developing test environment, verification specification documentation and working with cross-functional engineering teams on architecture, design and verification.Ownership/coding/enhancement of functional scoreboards/agents/sequences/monitorsResponsible for understanding architecture spec and deriving test cases / testplansHelp/drive throughput test case setup/analysis/report of the DUTDefine functional coverage/code/hit it through sequence enhancement and newer/directed test cases.Working closely with architecture and RTL designers on verifying the functionality correctness of the design; Participating in the development of Architecture and Microarchitecture specifications for the Logic components; Working closely with Validation Architect in defining validation strategy and reviewing test plan.Developing test plans and test environments; Developing tests in assembly, C, or SV according to test plans; Developing coverage monitors and analyze coverage to ensure all the test cases in the plans are covered.Develop new testbench methodologies and components to improve simulation efficiencyGuide and mentor junior engineers Qualifications:Bachelors or Masters degree in Electrical, Electronics or Computer Engineering with 10+ years of relevant industry experience including at least 5 years of pre-Si Validation experienceRelevant ASIC design/validation experience in front end processes including RTL functional, performance and power verificationGood knowledge of digital logic design, chip architecture and microarchitecture.Strong leadership skills and has the ability to work independentlyExpertise in verification of design blocks (IP) for system-on-chip (SoC) componentsExpertise in System Verilog and OVM or UVM based verification methodologiesExperience in OOP concepts, coverage based random validationExperience in one/more of the following areas PCIe, USBKnowledge of scripting, SVA, UPF validationKnowledge of PCIE and CXL protocols is a plusKnowledge of considerations for performance, power and cost optimization is desirableExperience with advanced verification techniques such as formal and assertions a plus.Needs to be a key team player, while being highly energetic and motivated, independent and self-driven Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations:India, Hyderabad Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

Job Details: Job Description: PCIe domain expertise is must, CXL domain knowledge will be added plus. To be able to convert High level architecture spec into microarchitecture, design feature scoping, implementation. Work closely with architecture, back end and Post Si teams to close on PCIe requirements, timing closure and Silicon debugs.Understand PCIe compliance testing, be able to lead design teamOversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development Qualifications:� Must possess a minimum of Bachelor Degree in Computer Engineering, Computer Science or Electrical Engineering with 10+ years of industry experience.� 10+ years of experience in high performance digital logic designs and integration, timing analysis and closure for high frequency designs.� Strong understanding of architecture, RTL design flows and debug skills, STA and Physical design exposure to be able to close the high frequency targets. � Proficient in RTL design using Verilog/System Verilog� Knowledge in industry FE/RTL tools and design, timing closure methodologies� Knowledge of PCIE and CXL protocols is a plus� Good communication and collaboration skills.� Ability to work independently and proactively to lead technical activities Job Type:Experienced Hire Shift:Shift 1 (India) Primary Location: India, Bangalore Additional Locations:India, Hyderabad Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.