Job Details:

Job Description: 

Do you want to collaborate with the best minds in the world? Are you passionate about AI and its potential in transforming the future of computing? Come intern with our team this summer.

In this undergraduate internship you will be working alongside a world-class SoC design team within the Xeon Engineering Group (XEG) delivering on next-generation Xeon products/IPs for server markets, with a focus on AI enabling SOCs. The internship duration is 3 months.

Your responsibilities will include but not be limited to:

• Block-level floor planning.

• Logic synthesis of design blocks.

• Utilize AI in targeted areas to improve designs.

• Formal Equivalence Verification (FEV), Auto Place-and-Route (APR) using Synopsys ICC tools.

• Timing verification using Synopsys Prime Time.

• Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for.

• Manufacturability checks DFM.

• Assist in the preparation of the layout design database for introduction to manufacturing.

• Participate in the design and development of AI enabling SOCs.

• Willingness to work independently and at various levels of abstraction.

The ideal candidate must exhibit the following skills and behavior traits:

• Excellent communication and teamwork skills.

• Strong analytical and problem-solving skills.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications

Candidate must be pursuing a bachelor's degree in electrical or computer engineering, or a related field.

3+ months of experience/coursework with:

• CMOS transistor level circuit fundamentals.

• VLSI hardware design and programming.

Preferred Qualifications
3+ months experience or coursework with:

• RTL/Logic design Verilog, VCS, etc.

• Electronic Design Automation tools, flows and methodology.

• ICCDP, Design Compiler, IC Compiler/ICC, Primetime, VCS, Verilog.

• Layout cleanup expertise DRCs, density, etc.

• Circuit design.

• Computer architecture.

• Python, TCL, Perl and/or C++ programming.

          

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Massachusetts, Hudson

Additional Locations:

US, Colorado, Fort Collins

Business group:

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, Colorado:$40,000.00-$108,000.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

The application window for this job posting is expected to end by 06/03/2024