Job Details:

Job Description: 

Do Something Wonderful!
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

Life at Intel

Diversity at Intel

This is a highly cross-functional role to actively manage IFS Shuttle Tape out Logistics and Integration.

As IFS Shuttle Operations manager your responsibilities will include but not limited to:

Design cost-effective TO operations workflows through automation to demonstrate reduced manual touch points in the E2E process:

Customer pre-tape-out deliverables and Foundry readiness, technical communications between Customers and Global Tapeout Operations (data prep, mask build), and delivering on-time wafer build logistics to multiple worldwide FABs.
Responsible for quality and timely execution of highly complex products, continuous improvement projects to enhance quality and efficiency, and ensuring high Customer satisfaction and success.
Establish new business processes that are aimed at improving the turnaround time for the IFS Shuttle program.

As a successful candidate, you must possess:

Proven Leadership skills - The ability to lead and deliver on cross-functional projects.

the ability to solve Complex Technical Problems and contribute to multiple projects at the same time.

This position is not eligible for Intel immigration sponsorship.

Qualifications:

You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

 

Minimum Qualifications:
Bachelor's in electrical engineering, science or STEM related fields
9+ years of related foundry industry experience with over 6+ years of experience chip design flow with emphasis on physical design.

6+ years of experience in chip physical design automation compute applications.
3 years of management experience with a global team

Preferred Qualifications:
Masters degree or PhD in Electrical Engineering, Materials Science or other relevant engineering or physical science discipline
Minimum 4-5 years of Mask Data Prep, Tapeout, Layout Design Engineering
Knowledge of the Mask Making Process

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, Oregon, Hillsboro

Business group:

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$127,260.00-$203,620.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.