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SOC Design Engineer - USA - CA - Santa Clara

1 day ago


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Job Opportunity Details

Type

Full Time

Salary

Not Telling

Work from home

No

Weekly Working Hours

Not Telling

Positions

Not Telling

Working Location

USA - CA - Santa Clara, United States   [ View map ]

Job Details:

Job Description: 

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!

·       Life at Intel

·       Diversity at Intel

The Network and Edge group (NEX) at Intel drives the software-defined transformation of the world's infrastructure - in data centers, in networks, and at the edge. The NEX Chief Strategy Office is chartered with both identifying the forces shaping the future and the strategic inflections points they are creating, as well as defining NEX's response to those. We translate strategic questions into distinct initiatives that deliver growth through actionable strategies.

As a SOC Design Engineer in the Network and Edge group you will be responsible for:

  • Overseeing definition, design, verification, and documentation for SoC (System on a Chip) development.
  • Determining architecture design, logic design, and system simulation.
  • Defining module interfaces/formats for simulation.
  • Performing Logic design for integration of cell libraries, functional units, and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
  • Contributing to or leading the development of multidimensional designs involving the layout of complex integrated circuits.
  • Performing all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
  • Mentor other team member in terms of design best practices and industry standard methodology.
  • May also review vendor capability to support development.

The SOC Design Engineer should possess the attributes below:

  • Strong communication skills and ability to formulate and deliver insights around complex business problems in a thoughtful and persuasive manner.
  • Demonstrated capability to thrive and continuously learn in a dynamic, innovative setting, showcasing a growth mindset, quick adaptability, and a strong commitment to efficient execution.
  • Exceptionally strong personal initiative, good business instincts, and comfort with ambiguity.
  • Demonstrated thought leadership and cross-group collaboration skills.
  • A team player willing to jump in where needed as an active contributor.

Qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study and 6+ years of relevant experience OR a Master's degree in in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study and 4+ years of relevant experience OR PhD in in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study and 2+ years of relevant experience.

  • 4+ years of experience in VLSI design, SoC STA sign-off.
  • 2+ years' experience programming in Perl or Python or Shell scripting, TCL.
  • 2+ years' experience in post silicon debug.
  • 2+ years' experience in EDA tools such as Cadence or Synopsys or Mentor Graphics.



How to Stand out (Preferred Qualifications):
Master's degree in in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study and 6+ years of relevant experience OR PhD in in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study and 4+ years of relevant experience

  • 6+ years' experience with PrimeTime, Tempus.
  • 6+ years' experience defining STA sign-off criteria, methodology, constraints.
  • 6+ years' experience leading the execution to drive SoC STA closure for tape-out and supporting silicon debug.



Amazing Benefits
Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment. Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program. Find more information about our Amazing Benefits here: https://jobs.intel.com/benefits
 

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

Business group:

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html


Annual Salary Range for jobs which could be performed in

US, California:$162,041.00-$259,425.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.


More Information

Application Details

  • Organization Details
    100 Intel Corporation
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