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Front-End Silicon Chip Lead - USA - CA - Santa Clara

1 day ago


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Job Opportunity Details

Type

Full Time

Salary

Not Telling

Work from home

No

Weekly Working Hours

Not Telling

Positions

Not Telling

Working Location

USA - CA - Santa Clara, United States   [ View map ]

Job Details:

Job Description: 

We are looking for a highly motivated Front-end Silicon Chip Lead with technical and leadership skills. The candidate will drive all technical aspects of SoC design activities from concept to tape out to build silicon products and prototypes on Intel's cutting edge process nodes.

In this role, responsibilities include:


- Design (microarchitecture and RTL) and integration of complex SoCs, subsystems and Ips.
- Ensuring quality by running and fixing items flagged by quality check flows such as lint, CDC, low power checks, LEC, hand-off to backend checks, emulation.
- Ensure design quality and completeness per milestone.
- Meet power, performance and area goals.

- Make schedule vs PPA tradeoffs as necessary.
- Work closely with cross functional teams (such as design verification, FPGA, physical design, package, software/firmware and post silicon) to enable their success by taking necessary actions on frontend.

#DesignEnablement

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:


Candidate must possess a BS degree with 9+ years of experience or MS degree with 6+ years of experience or PhD degree with 4+ years of experience in Electrical/Computer Engineering, Computer Science or related field .

9+ years of experience in the following:


- Microarchitecture and RTL skills.
- Designing complex functions and sub-systems.
- Complex IP integration.
- Design constraints.
- Prior technical leadership role in design, integration, quality checks and methodology.
- Familiarity with physical design and verification requirements.

Preferred Qualifications:

9+ years of experience in the following:


- RISC-V and/or ARM.
- AMBA protocols and NoCs.
- High speed IO subsystems such as DDR and PCIe.
- Designs involving complex mathematical functions.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, San Jose, US, Oregon, Hillsboro, US, Texas, Austin

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html


Annual Salary Range for jobs which could be performed in

US, California:$156,410.00-$250,410.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

More Information

Application Details

  • Organization Details
    100 Intel Corporation
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