Job Details:

Job Description: 

Develops, maintains, and ensures quality assurance of process design kit (PDK) collateral is the primary responsibility. Developing the custom design methodologies and integrating the PDK in the Design flows is the core job function. EDA tool / Flow integration with PDK, documenting the PDK contents is also expected out of this role. Develops automation of QA flow methodologies for specific technology nodes to scale up QA coverage. Documents and monitors QA results. May include developing test patterns to qualify the design rules and collaterals for correct implementations. Collaborates with silicon design, process engineering, and high-volume manufacturing teams to identify new process technologies and ensure new solutions are high quality and ensure ease of use for both internal and external design communities. Works with EDA vendors on tool improvements to enhance performance and add functionality.

Qualifications:

B.E./B.Tech/M.Tech with 3+ Years relevant experience in custom layout design methodology. Must have worked on virtuoso and/or custom compiler platform. Experience on oa_techfile/pcell/pycell development and understanding of cdf parameters and callbacks. Prior experience in handling EDA tools is added advantage. Candidate should be proficient in automation using Cadence SKILL/tcl/perl/python and other scripting languages. Candidate should be flexible to work on different aspects of PDK deliverables. Good in written and verbal communication skills.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.