Job Details:

Job Description: 

Development and support of ASIC tech files and development of ASIC flows/methodologies. Enabling APR tools for placement/routing and Timing to support new process node. physical designs(RTL to GDSII) of test vehicles to evaluate developed tech file and APR flow/methodology. Regular Interaction with Stakeholders including vendors during techfile and flow development. Timely tracking of issues and resolving the customer support issues. Write good documents for ASIC flows and PDK. Train the users and design engineers on ASIC flows and tech file usage. Debug the complex design issues and help the design and CAD teams in PDK and flow deployments.

Qualifications:

BTech/BE/MTech/ME/MSc in Electronics/Computer science with 3+yrs Industry experience in ASIC PDK kit/Physical design/ ASIC Design automation role. Hands-on experience with Synopsys and Cadence Place and Route tools, Timing tools, Floor planning, IR Drop and Physical verification. Should have good understanding of Verilog/VHDL. Exposure to low power techniques and PPA analysis. Good understanding of #D IC flow methodology will be added advantage. Knowledge of tcl and perl scripting is a must. Strong presentation and communication skills within an international environment. Team oriented in parallel to ability to work independently and bring new initiatives. Good in stakeholder management and should be detailed oriented.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.