Job Details:

Job Description: 

As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. IFS will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe available for customer globally and world class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IPs, along with ARM and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages.

IFS (CDE) Customer Design Enablement team is looking for a dynamic engineer who can lead 3DIC reference design test chip integration.  The role require close collaboration with path finding, architectures, pre-si, physical design, post-si and DFT teams. The lead has strong understanding
high speed digital interfaces like UCIe, LPDDR, PCLe, Protocol bridges (AXI/CFI/APB/PSF), NOC, HBI, FDI, etc ... and collaborate with internal teams building 3DIC test chip. 

Job responsibilities include but are not limited to:

• Excellent verbal and written communication skills.

• Ability to drive solutions cross-functional technical problems and working with senior technical peers.

• Microarchitecture 3D design configuration and die partition for SoC or Subsystem development.

• Work on RTL coding, logic design.

• Participate in the verification of various IPs for various process technologies.

• Create verification test plan and participate in discussion across architect and design verification environment in UVM for pre-silicon.

• Participate re-structure or create test benches in UVM or RAL

• Active involvement in hardware modeling and simulation, random and focused stimulus generation and functional coverage.

Qualifications:

Minimum Qualifications: 

• Bachelor's degree in Computer Engineering, Electrical Engineering, or equivalent with Master's degree in Computer Engineering, Electrical Engineering.

• 9+ years of industry experience listed below.

• Expertise in Verilog/System Verilog, Lint /CDC/Synthesis/STA/FormalEquivalent etc.

• Digital design or Computer architecture, or Object-Oriented Programming (OOP), or Design verification System Verilog OVM/UVM.

• Knowledge in ASIC validation methodology, Verilog testbenches, UVM and RAL.

• Experience in simulation/debug tools: VCS, Verdi.

• Demonstrate excellent communication, leadership and teamwork skills.

• Knowledge in Unix shell, Python and Perl scripting.

• Knowledge in Design For Test.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Business group:

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.