Job Details:

Job Description: 

Client Engineering Group HIP Malaysia is seeking senior mixed-signal design engineers to join our talented and vibrant team. You will be directly involved in delivering next-generation LPDDR5/DDR5 PHY designs for SOC application on
Intel leading process node.
Key Responsibilities include but not limited to:

• Innovate and Design mixed-signal circuits such as High Speed Transmitters and Receivers, equalizers, DLL, clocking distribution, on die voltage regulators and references blocks meeting circuit microarchitecture specifications

• Own design verification plans covering functional, performance and reliability meeting high volume productization requirement.

• Own CBB collateral for PHY level integration such as Timing Lib file and Behavioral Model (BMOD)

• Own Mixed signal verification for the CBB block

• Participate in circuit design review and work with Mask Designers on layout implementation and reviews

Qualifications:

• Proven track record on design of high speed analog and mixed-signal design, architecture, system and integration aspects for DDR PHYs

• Good Understanding of to LPDDR/DDR JEDEC specifications and related DDR Protocols

• Good understanding of design for yield and exposure to production challenges in latest technology process node

• Experience with industry standard tools for Analog design such as Cadence ADE, Spectre, AMS verification, FEV, StarRC etc..

• Experience in programming language such as Phyton or Perl

• Cross-discipline knowledge in any of these areas, such as Analog integration, RTL/System Verilog,

• Static timing analysis concepts, APR, Floor-planning, Metal-routing, Power-grid, Memory IO training

• MRC and HAS/MAS specification documentation.

• Strong written and oral communication skills

• BSEE with 5+ years relevant experience or Master's with 3+ years relevant experience required.

• Education Focus should include integrated circuit design and analog design.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Malaysia, Kulim

Business group:

The Client Engineering group (CEG) is a worldwide organization focused on the development and integration of SOCs, and critical IPs that power Intel's leadership products, driving the Client roadmap for CCG, and invest in future disruptive technologies.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.