Job Details:

Job Description: 

PDK/Component design Engineers are responsible for the validation of PDK offering by planning/development of testsuites, automating the flows through python, Skill and TCL. Responsibilities may include: the design of circuit , circuit validation through simulations, validating the library pcells/pycells across the EDA tools offered in a PDK. Requires good analytical skills to evaluate the validation planning, results review, reviewing of specification of new devices in PDK and logic diagrams. Responds to customer/client requests or events as they occur. Develops solutions to problems utilizing formal education and judgement.

Qualifications:

PDK library Validation and leading a team of 4-5 members is primary requirement. Candidate should have good experience/knowledge in PDK, pcell/pycell usage, Front End custom design methodology. Must have worked on Cadence virtuoso/ Synopsys Custom Design Platform, verification, extraction, simulation tools across multiple EDA tools. Automation experience in Python, Jenkins, Skill is required. Candidate should be flexible to work across cross site timings to collaborate and complete the validation. Candidate should have experience in planning of tasks, assignment, follow-up with stake holders to meet PDK library validation quality and timelines. BE, B. Tech, MTech Graduate with 8+ years of experience

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.