Job Details:

Job Description: 

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply.

This job opportunity in IFS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the "best of Intel" technologies to IFS customers, differentiating and accelerating their solutions from architecture to post-silicon validation.

Responsibilities include but not limited to:

Tops-down floorplanning of an SOC in collaboration based on IP, Package, Bump and technology constraints. Estimate of Die area

Collaboration with IP and Package owners to finalize IP Placement

Definition of Bump-map in collaboration with IP Owners and delivering Validated Die file to Packaging and other stakeholders.

Influencing Physical Partition of the Sub-Blocks, Shape and Pin Planning, Power Grid Planning and channel planning and delivering Tops-down constraints to partition owners for place and route

Definition Chip integration contour including PDK, Tools, IP and Bump versions.

Driving for Layout Verification Convergence for DRC, LVS, Density and Power Delivery

Performing RDL / Top Level routing routing and MIM insertion analysis

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Master of Science degree in Electrical/Computer Engineering with 10+ yrs of relevant experience, OR Bachelor of Science degree in Electrical/Computer Engineering with 12+ yrs of relevant experience

Experienced Floorplanning at Chip level/Subsystem Level at least for 4 SOCs experience of and minimum 2 SOCs as floorplan owner

Must have dealt with SOCs in High performance computing space preferable Datacenter/AI dealing with complex problem like SOC fabric floorplanning

Must have experience on 5nm or below Industry Process

Must be experienced in SNPS/Cadence floorplanning tools

Scripting Skills in TCL needed.

Must be a strong communicator, excellent in verbal/written communication.

#IFSjobs

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.