Job Details:

Job Description: 

Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre silicon Validation teams in improving post silicon test content and providing feedback for future on die debug features.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum requirements: The scope of the deliverable will vary based on the target platform and specific issue at hand. Hence the candidate must have a solid big picture across the System. While having that big picture, the candidate must also have good understanding in one or more the following areas: - Candidate must possess a Master's or Bachelors. degree in Electrical Engineering, Computer Engineering or a related discipline. - Minimum of 5 years of experience in Post Silicon/Platform Validation - Server Architecture knowledge - Server Memory/PM Architecture - Boot/Reset flows - System Architecture - HW-FW-SW as a whole. - Knowledge of Pre-silicon or Post-silicon Validation - SW/HW Validation Experiences: unit / functional/ integration / exploratory - Debugging techniques local/remote, including profilers, debuggers, and system monitoring hardware desired. - Experience in Emulation/FPGA/Virtual Platforms - Strong Communication and good Problem Solving Skills Preferred qualifications: - Familiar with Simics Model development for Hybrid/Virtual Platform Minimum Qualifications: - 3+ years of experience in Systems validation and/or Platform validation experience. - 2+ years of experience in debug experience at platform level. - 2+ years of experience in Coded/Debugged/Troubleshooted firmware. Preferred Qualifications: - Experience in one or more technical domains such as power management, peripheral interface (PCIe, CXL) and Memory. - Familiarity with BIOS. - Familiarity/Experience with Python, Jenkins, Windows Power shell/Linux Scripting. - Experience in x86 architecture. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.