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Logic-RTL Design Engineer - PTK1 - PTK1 - Petah Tikva 1

26 days ago


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Job Opportunity Details

Type

Full Time

Salary

Not Telling

Work from home

No

Weekly Working Hours

Not Telling

Positions

Not Telling

Working Location

PTK1 - PTK1 - Petah Tikva 1, Israel   [ View map ]

Job Details:

Job Description: 

About the Organization:
As part of the Core Engineering Group, we develop Intel's main and most valuable and complex IP - the CORE. The CORE is the central part of many of Intel's products, such as: Desktops, Notebooks, Servers, Cloud CPUs and more. Our CORE is in the heart of hundreds of millions of products being sold every year, and is driving the internet, networking industry, cloud compute, communications, and more. The team is part of Intel's Core Group - P-core, and is responsible for the development of next generation Core-CPU.


About the Job:
We are looking for a Logic-RTL Design Engineer to join P-Core's MLC Team. In this role, you will be responsible for uArch-definition and coding of Intel's Mid-Level-Cache features. Intel's Core is a leading IP, with large impact on product goodness and corporate profits. In addition, the role's responsibilities include, uArch definition/coding/debug of MLC features. It also includes development using unique, state-of-the-art languages and tools, and advanced software engineering methodologies. Designers will also be supporting large interfaces from architecture, Back-end, verification and Post-Si validation.
In addition to design languages and design methodologies, engineers will develop expertise with Intel's Core Architecture and Micro Architecture and will be deeply involved in feature's definition for Intel next generation products. Engineers are expected to be independent, creative, with the ability to innovate new solutions and demonstrate uncompromising quality during their work.

Qualifications:

  • B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering.
  • At least 5 years of overall experience performing RTL logic design using System Verilog.
  • System understanding and fast learner.
  • Excellent communication and team work skills.
  • Experience with design partitioning, micro-architecture trade-offs - advantage.
  • Experience working with validation engineers to develop functional validation and coverage test plans - advantage.
  • Strong problem solving and debugging skills and ability to work closely with various chip design disciplines and cross site teams - advantage.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location: 

Israel, Petah-Tikva

Additional Locations:

Business group:

The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

More Information

Application Details

  • Organization Details
    620 Intel Israel (74) Limited
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