Job Details:

Job Description: 

The position is for Senior experience person (>15 years of industry experience) in Physical Design CAD domain. Candidate should have expert level knowledge in physical design tools and methodologies with emphasis on physical design flows. In this position, candidate is expected to develop and support solutions in a wide variety of activities related to Synthesis (Fusion Compiler/Genus-Innovous), Placement, Routing, Timing convergence, Scan, Hard Macro integration and Physical convergence. Candidate must have hands on experience on STA and timing closure flows. Candidate will be working on developing, deploying and supporting CAD solutions for multiple SoC and IPs on advance process technology nodes. Candidate is also expected to participate in the development of next generation tools and methodologies in physical design world closely working with both external and internal vendors.

- Developing SD/PD methodologies to improve efficiency in design convergence

- Working with internal and external stakeholder for smooth delivery of projects needs

Qualifications:

•Deep, Expert level experience in Synopsys design implementation tools – Design Compiler, Fusion compiler, IC CompilerII (ICC2),  Cadence Genus and Innovous.   Hands on experience in working with complex Backend designs.
•Experience in Digital RTL to GDS flow, Hierarchical synthesis , Design Planning Flow , Push Down, Pop Up, Pin Placement , Interconnect Planning, UPF/MV and Power Grid Design
•Hands on experience in  Industry standard sign off tools
•Coding expertise in TCL,  Perl and Python scripting knowledge is preferable.
•Excellent communication and stakeholder management skills.
•Experience of managing small team is preferred.
•M.Tech in EE/EEE with >15 years of relevant industry experience.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

India, Hyderabad

Business group:

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.