Job Details:

Job Description: 

We are looking for a highly motivated Chip Lead for STA and Power with technical and leadership skills. In this role, responsibilities include: Perform and analyze STA timing at the partition level and full chip level through tape-in. Run DMSA and generate ECO files to meet PPA. Fully own timing constraints setup, complete timing runs on all corners and modes. Sign-off STA timing and path exceptions. Close time using construction tools and run PTPX for power analysis. Conduct Power/Performance/Area trade-offs with respect to design optimization. Experienced with liberty files, PVT corners, and STA flow setup and reporting.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Candidate must possess a BS degree with 8+ years of experience or MS degree with 6+ years of experience or PhD degree with 4+ years of experience in Electrical/Computer Engineering, Computer Science or related field . 5+ years of experience with: Synopsys or Cadence design (RTL to GDS) tools. Synopsys-Primetime and PTPX for both STA timing and power analysis. Coding both UPF and timing constraints files for both partition and SoC level. Experience in Perl, TCL/Tk programming. Preferred Qualifications: Experience with RTL/Logic design Verilog Experience in APR flow and timing closure using Synopsys or Cadence tools. Conduct floor planning activities including trade-offs in Macro placements, Power Grid definition, and integration requirements. Perform DRC and LVS layout verification activities. Experience with TFM (Tools, Flows, Methodology) Development

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

India, Hyderabad

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.