Job Details:

Job Description: 

The Memory IP Group (MIP) within the Client Engineering Group (CEG) is looking for a Pre-Silicon Verification Engineer to deliver latest and best in class DDR PHY IP for SoCs across Intel for the latest desktop, laptop, and other products.In this role you will perform all aspects of the verification flow through simulation and/or emulation.Performing IP Verification related tasks such as creating test plan, validating design and micro-architectural implementation.Automating validation tasks to get it done in the most efficient way possible. Analyzing result and help to debug issues in pre-silicon environment at IP, subsystem and SOC level.The additional responsibilities include:development of validation strategies and plans, scoping and driving execution for different area of pre-Si validation.provide guidance and help to team members in understanding issues, removing roadblocks and ensuring issue resolution.strong demonstration of Intel Cultural values

Qualifications:

The Memory IP Group (MIP) within the Client Engineering Group (CEG) is looking for a Pre-Silicon Verification Engineer to deliver latest and best in class DDR PHY IP for SoCs across Intel for the latest desktop, laptop, and other products.In this role you will perform all aspects of the verification flow through simulation and/or emulation.Performing IP Verification related tasks such as creating test plan, validating design and micro-architectural implementation.Automating validation tasks to get it done in the most efficient way possible. Analyzing result and help to debug issues in pre-silicon environment at IP, subsystem and SOC level.The additional responsibilities include:development of validation strategies and plans, scoping and driving execution for different area of pre-Si validation.provide guidance and help to team members in understanding issues, removing roadblocks and ensuring issue resolution.strong demonstration of Intel Cultural values Qualifications: Candidate must possess a Bachelor or higher of degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science or equivalent with 5-10 years of relevant experience in Design verification, System Verilog and OVM/UVM Experienced in validation methodology, waveform debug, functional coverage, VCS simulation Capable of multitasking in dynamic environment with multiple teams from different geo Solid verbal and written communication skills Excellent debug and problem solving skills Preferred Qualifications: Knowledge of computer architecture preferably x86Scripting languages such as Python/ Perl Experience in JTAG, MBIST, IOV validation and HVM is more preferable

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

India, Hyderabad

Business group:

The Client Engineering group (CEG) is a worldwide organization focused on the development and integration of SOCs, and critical IPs that power Intel's leadership products, driving the Client roadmap for CCG, and invest in future disruptive technologies.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.