Job Details:

Job Description: 

Intel's Advanced Packaging (AP) technologies extend and drive Moore's Law as the company aspires to a trillion transistors in a package by 2030. Intel has led the industry in disaggregated advanced packaging for a couple of decades. Its innovations include EMIB (embedded multi-die interconnect bridge) and Foveros, technologies that allow multiple chips on a package to be connected side by side (EMIB) or stacked on top of one another in a 3D fashion (Foveros).

The Disaggregated Manufacturing Organization (DMO) develops fab processes for Foveros base silicon interposer and embedded multi-die interconnect silicon bride (EMIB) architectures to enable both internal and Foundry AP future roadmaps.

The New Mexico DMO Technology Development Team is looking for a Product Integration engineer to join our EMIB/FOVEROS TD team.

About the role:

EMIB/ FOVEROS TD Product Integration team coordinates and drives the TD team's test vehicle / early product roadmap and schedules, by working with layout/design, tapeout, mask manufacturing, fab, and post fab teams to ensure EMIB/ FOVEROS product requirements.

Yield Analysis Engineer  responsibilities include but are not limited to:

• Working with fab team to define frame content to include on technology tapeouts.
• Layout reviews to ensure designs are DRC and correct sizing applied before mask manufacture.
• Document product specific details, generate/audit/improve New Product/Technology Introduction checklists.
• Partner with TD team to ensure NPIs are intercepting expected process flow/recipes.
• Coordinate and own NPI scout lot setup/release/progress setting up flow.
• Develop strong partnerships with fab operations team to ensure critical NPI lots are meeting customer commitment.

The ideal candidate should exhibit the following behavioral traits:

• Understanding of post fab/pre-shipping wafer requirements
• Knowledge of NPI Checklist systems
• Preparing detailed, clear, and timely reports summarizing key lot status and driving organization to meet commitments.
• Basic understanding of the Interconnect process integration is a plus.

Relocation assistance provided.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork, classes, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

• Bachelor's or Master's degree in Electrical Engineering, Physics, Material Science and Engineering, Computer Science, Chemical Engineering, Mechanical Engineering, Chemistry, or related field.

Preferred Qualifications:

• 1+ year(s) of experience with semiconductor processing fundamentals (lithography, wet and or dry etch, chemical and or mechanical polishing, etc.), semiconductor and or transistor device physics and design of experiments.
• 1+ year(s) of experience with materials characterization (SEM, TEM, etc.), materials fabrication, synthesis, or metrology
• 6+ months experience with model-based problem-solving technique to solve complex problems.
• Statistical data analysis (JMP, Excel, MATLAB, etc.)
• Demonstrated STEM research experience.

          

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location: 

US, New Mexico, Albuquerque

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.