Job Details:

Job Description: 

Do Something Wonderful!

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most outstanding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth. ur diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people’s digital lives. Come join us and do something wonderful!

Who we Are:

Intel Federal LLC is a wholly owned subsidiary of Intel Corporation responsible for managing Intel's business with the US Federal Government. We collaborate with Sales and Marketing, government affairs, and Intel business units (BUs) across Intel to develop and execute programs for US Government (USG) agencies. Intel Federal works with and across the defense industrial base (DIB) and systems integrator (SI) ecosystem to deliver mission solutions to USG customers.

Intel Federal's Mission:

Drive rapid, sustained, profitable growth of Intel's business in the Federal markets in partnership with product, research, and foundry teams while maintaining compliant execution of programs. Establish Intel as the national champion for semiconductors.

Who you are:

Come join the Extreme Scale Computing team as a Logic Design Engineer. We are developing the next generation prototype solutions across Supercomputing, Memory, and heterogenous computing systems. If you have a strong interest to influence next-generation development of High-Performance Computing Processor for Supercomputers, Graph Analytics/AI/Machine Learning SOCs or custom ASICs to partner with Xeon processor, this is the team to join!

A day in the life of:

As an experienced Validation Lead, you will:

• Create and oversee test plans for RTL validation, run system simulation models, and implement corrective measures.

• Develop pre-Silicon functional validation tests to verify system will meet design requirements.

• Analyze and modify testing; requires strong understanding of one (or more) of the following: DFX, Security, Full-chip, Performance, RAS, Power Management.

• Develop verification collateral such as behavioral checkers, coverage monitors, test generators or scoreboards.

• Analyze coverage gaps and devise strategies to fill them. Establish strong design quality metrics through critical verification techniques.

• Work closely w/Architect/Micro-Architecture and Design teams to devise the best validation strategies for next gen designs.

• Develop, and review validation code for efficiency/coverage and drive any paradigm shifts needed in validation execution.

The ideal candidate will exhibit the following behavioral skills in addition to the qualifications listed below:

• Self-driven and results-oriented, capable of effectively working multiple tasks.
• Effective communication skills, as well as experience in collaboration, listening and providing feedback.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Bachelor's Degree in Electrical Engineering or Computer Engineering and 6+ years of relevant experience or a

Master's Degree in Electrical Engineering or Computer Engineering and 4+ years of relevant experience or a

PhD in Electrical Engineering or Computer Engineering and 2+ years of relevant experience, including the following:

• 6+ years of RTL pre-silicon validation experience.
• 5+ years of experience with System Verilog with OVM/UVM methodology.
• 5+ years of experience with Computer Architecture, Microprocessor or Chip-set validation methods.

Preferred Qualifications

• Background in X86 or RISCV Intel® Intelligent Systems Alliance (Intel® ISA) and pipeline architecture/design.
• Experience with Synopsys DC for synthesis and timing analysis.
• Experience with SystemC and SystemVerilog.
• Proficiency with Microsoft Office Suite.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara

Business group:

Enable amazing computing experiences with Intel Software continues to shape the way people think about computing – across CPU, GPU, and FPGA architectures. Get your hands on new technology and collaborate with some of the smartest people in the business. Our developers and software engineers work in all software layers, across multiple operating systems and platforms to enable cutting-edge solutions. Ready to solve some of the most complex software challenges? Explore an impactful and innovative career in Software.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$144,501.00-$217,311.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.