Job Details:

Job Description: 

In this position, you will lead and participate in the design, development, validation, and delivery of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors.

Responsibilities include, but are not limited to:

- Design and implementation of the combinatorial, clock, power management, and sequential circuits for Intel's newest process technologies.
- Parasitic extraction and circuit optimization for power/performance/robustness/density.
- Library characterization for timing, noise, power, and variation models (non-linear delay models; composite current source models, parametric on-chip variation models).
- Reliability verification of standard cells covering ERC, EM, SH, FinFet self-heating. APL characterization and modeling.
- Developing functional models behavioral Verilog, power udp Verilog and fault models.
- Development of automation for library modeling, validation, quality checking, performance, and reliability verification.
- The library build, validation, QA, release, and support.
- Technically lead a team of engineers, debug problems, remove execution roadblocks, detailed planning of execution/releases, and work on strategic initiatives for future technologies.

Candidate must exhibit written and verbal communication skills, customer/result orientation and the ability to work with external and internal partners in a flexible manner.

#DesignEnablement

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must possess a BS degree with 3+ years of experience, MS degree with 2+ years of experience or PhD degree with 1+ years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Experience in the following:

- Using industry-standard design automation tools in one or more of the areas: circuit simulation, std cell characterization, synthesis, place and route, physical design verification and reliability verification.

- Experience in scripting (TCL and/or Perl and/or Python and/or ML) for design automation.

- Experience working in the Linux environment and its development tools.

Preferred Qualifications:

Experience in the following:

- Experience with review of backend models oasis, oalibs and ndm.
- Experience with one of the following tools: Virtuoso, ICC2, Fusion Compiler.
- Experience with reviewing standard cell library.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, California, Folsom

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:  https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in

US, California:$106,231.00-$159,109.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.